Capacitive humidity sensor in CMOS technology

Author(s):  
Xian-Wei Yan ◽  
Ming Qin ◽  
Qing-An Huang
2014 ◽  
Vol 556-562 ◽  
pp. 1842-1846
Author(s):  
Fang Ming Deng ◽  
Yi Gang He

This paper presents a capacitive humidity sensor in CMOS technology. The humidity sensor element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication cost. The sensor interface is based on a delta-sigma converter and can be easily reconfigured to compensate for process variation of the sensing element. The proposed humidity sensor is fabricated in 0.16μm standard CMOS process and the chip occupies 0.25mm2. The measurement result shows that this humidity sensor acquires a resolution of 0.1%RH in the range of 20%RH to 90%RH. The interface achieves a 12.5-bits capacitance-to-digital conversion and consumes only 9.6μW power at 1.2V supply voltage.


1988 ◽  
Vol 15 (4) ◽  
pp. 325-335 ◽  
Author(s):  
M. Parameswaran ◽  
H.P. Baltes ◽  
M.J. Brett ◽  
D.E. Fraser ◽  
A.M. Robinson

2014 ◽  
Vol 556-562 ◽  
pp. 1847-1851
Author(s):  
Xiang Wu ◽  
Fang Ming Deng

This paper presents a capacitive humidity sensor in CMOS technology. The humidity sensor element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication cost. The sensor interface employs a fully-digital architecture based on phase locked loop, which results in low pow dissipation. The proposed humidity sensor is fabricated in TSMC 0.18μm CMOS process and the chip occupies an area of 0.05mm2. The measurement result shows that the sensor value exhibits good linearity within the range of 10-90%RH and the interface circuit consumes only 1.05μW at 0.5V supply voltage.


2008 ◽  
Vol 517 (2) ◽  
pp. 948-951 ◽  
Author(s):  
Long Yu Li ◽  
Yong Fen Dong ◽  
Wei Fen Jiang ◽  
Hui Fang Ji ◽  
Xin Jian Li

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