Digital-signal-processor-based inspection of populated surface-mount technology printed circuit boards

1991 ◽  
Author(s):  
David A. Hartley ◽  
Clifford A. Hobson ◽  
Francis Lilley
2011 ◽  
Vol 341-342 ◽  
pp. 411-415
Author(s):  
Ping Liu ◽  
Xiao Long Gu ◽  
Xin Bing Zhao ◽  
Xiao Gang Liu

The complexity of Printed Circuit Boards (PCBs) has increased dramatically over the last three decades with the development of surface mount technology (SMT). The typical manufacture of rigid multilayer PCB contains many process procedures, which makes manufacture and application much more challenges. This paper focuses on some typical PCB related failures. Recommendations are provided on optimizing PCB manufacture process and material application. Microvia crack, black pad, galvanic attack, pad design, conductive anodic filament and pad crater are presented in detail.


1994 ◽  
Vol 116 (4) ◽  
pp. 282-289 ◽  
Author(s):  
Yu-Wen Huang ◽  
K. Srihari ◽  
Jim Adriance ◽  
George Westby

The placement of surface mount components is a time consuming and critical task in the assembly of surface mount Printed Circuit Boards (PCBs). The focus of this research was the identification of “near optimal” solutions for the placement sequence identification problem. The factors considered include the placement machine and the specific PCB, the feeder space available, the need for tooling and nozzle changes, and the actual traveling path of the placement head. Expert (or knowledge based) systems were used as the solution method for this problem. The system developed can cope with single PCBs, panels, 180 deg offset boards (panels), and multiple PCB batches. The prototype knowledge based system developed in this research identifies solutions in (almost) realtime.


2020 ◽  
Vol 17 (3) ◽  
pp. 79-88
Author(s):  
Maarten Cauwe ◽  
Bart Vandevelde ◽  
Chinmay Nawghane ◽  
Marnix Van De Slyeke ◽  
Erwin Bosman ◽  
...  

Abstract High-density interconnect (HDI) printed circuit boards (PCBs) and associated assemblies are essential to allow space projects to benefit from the ever increasing complexity and functionality of modern integrated circuits such as field-programmable gate arrays, digital signal processors and application processors. Increasing demands for functionality translate into higher signal speeds combined with an increasing number of input/outputs (I/Os). To limit the overall package size, the contact pad pitch of the components is reduced. The combination of a high number of I/Os with a reduced pitch places additional demands onto the PCB, requiring the use of laser-drilled microvias, high-aspect ratio core vias, and small track width and spacing. Although the associated advanced manufacturing processes have been widely used in commercial, automotive, medical, and military applications, reconciling these advancements in capability with the reliability requirements for space remains a challenge. Two categories of the HDI technology are considered: two levels of staggered microvias (basic HDI) and (up to) three levels of stacked microvias (complex HDI). In this article, the qualification of the basic HDI technology in accordance with ECSS-Q-ST-70-60C is described. At 1.0-mm pitch, the technology passes all testing successfully. At .8-mm pitch, failures are encountered during interconnection stress testing and conductive anodic filament testing. These failures provide the basis for updating the design rules for HDI PCBs.


Author(s):  
A. De Luca Pennacchia ◽  
L. G. De la Fraga ◽  
U. Martí­nez Hernández

The progressive implementation of software functions in Integrated Circuits (ICs) has considerably increased the number of transistors and pin connections of ICs. For that reason, Printed Circuit Boards (PCBs) are fabricated with the Surface Mount Technology (SMT) nowadays and IC mounting on PCB is a crucial process that requires high precision. An Automatic Mechanical Montage (AMM) system is used to mount ICs on the sockets using a couple of reference points for every IC in order to find the correct positions for mounting the IC. Due to some factors in the process of PCB development, there are differences between designed and manufactured PCBs, which could generate delays in their production. In this work, a software tool which allows to work with digital images of PCBs is described. This tool finds the differences generated in PCB development, especially the differences in IC reference points using Digital Image Processing (DIP) techniques.


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