PRIOPS: A REAL-TIME PRODUCTION SYSTEM ARCHITECTURE FOR PROGRAMMING AND LEARNING IN EMBEDDED SYSTEMS

Author(s):  
DALE E. PARSON ◽  
GLENN D. BLANK

The Prioritized Production System (PRIOPS) is an architecture that supports time-constrained, knowledge-based embedded system programming and learning. Inspired by the theory of automatic and controlled human information processing in cognitive psychology, PRIOPS supports a two-tiered processing approach. The automatic partition provides for compilation of productions into constant-time-constrained processes for reaction to environmental conditions. The notion of a habit in humans approximates the concept of automatic processing trading flexibility and generality for efficiency and predictability in dealing with expected environmental situations. Explicit priorities allow critical automatic activities to pre-empt and defer execution of lower priority processing. An augmented version of the Rete match algorithm implements O(1), priority-scheduled automatic matching. The controlled partition supports more complex, less predictable activities such as problem solving, planning, and learning that apply in novel situations for which automatic reactions do not exist. The PRIOPS notation allows the programmer of knowledge-based embedded systems to work at a more appropriate level of abstraction than is provided by conventional embedded system programming techniques. This paper explores programming and learning in PRIOPS in the context of a maze traversal program.

2012 ◽  
Vol 1 (1) ◽  
pp. 17-38 ◽  
Author(s):  
Amen Ben Hadj Ali ◽  
Mohamed Khalgui ◽  
Samir Ben Ahmed

The paper examines UML-based design and validation of reconfigurable embedded control systems which can have multiple software architectural configurations such that each one is designed by a set of inter-connected software components. To handle dynamic reconfiguration scenarios, the authors define a software agent which interacts with users and applies several forms of reconfiguration at different granularity levels of the system’s architecture. The agent has the ability of monitoring the system’s environment and to apply appropriate and valid reconfiguration scenarios under well-defined constraints. Three architectural levels are defined in order to consider all possible reconfiguration forms of embedded systems. The authors define a set of UML-compliant metamodels to describe the knowledge about the reconfiguration agent, the system architecture, the reconfiguration scenarios, and the reconfiguration events. Validity of reconfigurations scenarios are checked using an UML-based environment which allows evaluating architectural and reconfiguration constraints. The proposed reconfiguration approach is applied to the FESTO production system.


Author(s):  
Anupama Surendran ◽  
Philip Samuel

Even though human beings are using computers in their day-to-day activities, the terms embedded and real-time systems have received much attention only in the last few years, and they have become an inevitable part of our daily activities. The most evident and highlighted feature of embedded systems is the consideration of time. The significance of time constraints in designing each and every feature of embedded systems has made the software and hardware of embedded systems more complicated and entirely different from ordinary systems. Due to these reasons, several challenges exist in developing and maintaining embedded and real time software. Increase in complexity of the embedded system code increases the chance of occurrence of defects in the embedded software. Failure to deliver the software within the stipulated time, economic constraints faced during the development and the maintenance phase, inadequate testing, design of improper code and its reuse are some of the issues faced during the embedded system software development phase. In this chapter, the authors suggest a knowledge-based approach in managing the issues that arise during the coding and testing phase of embedded and real-time software. Program slicing is used to detect the code clones present in the embedded software, and a knowledge repository of code clones is created. This code clone knowledge repository is utilized during the coding and testing phase of real-time and embedded software, which in turn improves the whole software development process.


10.28945/3391 ◽  
2009 ◽  
Author(s):  
Moshe Pelleh

In our world, where most systems become embedded systems, the approach of designing embedded systems is still frequently similar to the approach of designing organic systems (or not embedded systems). An organic system, like a personal computer or a work station, must be able to run any task submitted to it at any time (with certain constrains depending on the machine). Consequently, it must have a sophisticated general purpose Operating System (OS) to schedule, dispatch, maintain and monitor the tasks and assist them in special cases (particularly communication and synchronization between them and with external devices). These OSs require an overhead on the memory, on the cache and on the run time. Moreover, generally they are task oriented rather than machine oriented; therefore the processor's throughput is penalized. On the other hand, an embedded system, like an Anti-lock Braking System (ABS), executes always the same software application. Frequently it is a small or medium size system, or made up of several such systems. Many small or medium size embedded systems, with limited number of tasks, can be scheduled by our proposed hardware architecture, based on the Motorola 500MHz MPC7410 processor, enhancing its throughput and avoiding the software OS overhead, complexity, maintenance and price. Encouraged by our experimental results, we shall develop a compiler to assist our method. In the meantime we will present here our proposal and the experimental results.


Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.


Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1031
Author(s):  
Joseba Gorospe ◽  
Rubén Mulero ◽  
Olatz Arbelaitz ◽  
Javier Muguerza ◽  
Miguel Ángel Antón

Deep learning techniques are being increasingly used in the scientific community as a consequence of the high computational capacity of current systems and the increase in the amount of data available as a result of the digitalisation of society in general and the industrial world in particular. In addition, the immersion of the field of edge computing, which focuses on integrating artificial intelligence as close as possible to the client, makes it possible to implement systems that act in real time without the need to transfer all of the data to centralised servers. The combination of these two concepts can lead to systems with the capacity to make correct decisions and act based on them immediately and in situ. Despite this, the low capacity of embedded systems greatly hinders this integration, so the possibility of being able to integrate them into a wide range of micro-controllers can be a great advantage. This paper contributes with the generation of an environment based on Mbed OS and TensorFlow Lite to be embedded in any general purpose embedded system, allowing the introduction of deep learning architectures. The experiments herein prove that the proposed system is competitive if compared to other commercial systems.


Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 34
Author(s):  
Michele Alessandrini ◽  
Giorgio Biagetti ◽  
Paolo Crippa ◽  
Laura Falaschetti ◽  
Lorenzo Manoni ◽  
...  

Singular value decomposition (SVD) is a central mathematical tool for several emerging applications in embedded systems, such as multiple-input multiple-output (MIMO) systems, data analytics, sparse representation of signals. Since SVD algorithms reduce to solve an eigenvalue problem, that is computationally expensive, both specific hardware solutions and parallel implementations have been proposed to overcome this bottleneck. However, as those solutions require additional hardware resources that are not in general available in embedded systems, optimized algorithms are demanded in this context. The aim of this paper is to present an efficient implementation of the SVD algorithm on ARM Cortex-M. To this end, we proceed to (i) present a comprehensive treatment of the most common algorithms for SVD, providing a fairly complete and deep overview of these algorithms, with a common notation, (ii) implement them on an ARM Cortex-M4F microcontroller, in order to develop a library suitable for embedded systems without an operating system, (iii) find, through a comparative study of the proposed SVD algorithms, the best implementation suitable for a low-resource bare-metal embedded system, (iv) show a practical application to Kalman filtering of an inertial measurement unit (IMU), as an example of how SVD can improve the accuracy of existing algorithms and of its usefulness on a such low-resources system. All these contributions can be used as guidelines for embedded system designers. Regarding the second point, the chosen algorithms have been implemented on ARM Cortex-M4F microcontrollers with very limited hardware resources with respect to more advanced CPUs. Several experiments have been conducted to select which algorithms guarantee the best performance in terms of speed, accuracy and energy consumption.


Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.


2000 ◽  
Vol 33 (17) ◽  
pp. 425-430
Author(s):  
Sacile Roberto ◽  
Massimo Paolucci ◽  
Antonio Boccalatte

2018 ◽  
Vol 7 (2.7) ◽  
pp. 146
Author(s):  
Lakshmi Prasad Mudarakola ◽  
J K.R. Sastry ◽  
V Chandra Prakash

Thorough testing of embedded systems is required especially when the systems are related to monitoring and controlling the mission critical and safety critical systems. The embedded systems must be tested comprehensively which include testing hardware, software and both together. Embedded systems are highly intelligent devices that are infiltrating our daily lives such as the mobile in your pocket, and wireless infrastructure behind it, routers, home theatre system, the air traffic control station etc. Software now makes up 90% of the value of these devices. In this paper, authors present different methods to test an embedded system using test cases generated through combinatorial techniques. The experimental results for testing a TMCNRS (Temperature Monitoring and Controlling Nuclear Reactor System) using test cases generated from combinatorial methods are also shown.


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