scholarly journals A Novel Rail-Network Hardware Simulator for Embedded System Programming

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Learning Outcomes ◽  
Real World ◽  
Time Constraints ◽  
Network Simulator ◽  
Practical Applications ◽  
Rail Network ◽  
Knowledge Enhancement

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.

scholarly journals The Design of a 2D Graphics Accelerator for Embedded Systems

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Line Drawing ◽  
Cmos Process ◽  
Embedded Processor ◽  
Processor Core ◽  
Field Programmable ◽  
The Embedded System ◽  
Graphics Processing

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.

Implementation of FastSLAM2.0 on an Embedded System and HIL Validation using Different Sensors Data

2015 ◽  
Vol 6 (2) ◽  
pp. 88-116
Author(s):  
Abouzahir Mohamed ◽  
Elouardi Abdelhafid ◽  
Bouaziz Samir ◽  
Latif Rachid ◽  
Tajer Abdelouahed
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Particle Filter ◽  
Real Time ◽  
Autonomous Navigation ◽  
Hardware In The Loop ◽  
Heterogeneous Architectures ◽  
Localization And Mapping ◽  
Embedded Applications ◽  
Robotic Applications

The improved particle filter based simultaneous localization and mapping (SLAM) has been developed for many robotic applications. The main purpose of this article is to demonstrate that recent heterogeneous architectures can be used to implement the FastSLAM2.0 and can greatly help to design embedded systems based robot applications and autonomous navigation. The algorithm is studied, optimized and evaluated with a real dataset using different sensors data and a hardware in the loop (HIL) method. Authors have implemented the algorithm on a system based embedded applications. Results demonstrate that an optimized FastSLAM2.0 algorithm provides a consistent localization according to a reference. Such systems are suitable for real time SLAM applications.

scholarly journals Implementing a Chaotic Cryptosystem by Performing Parallel Computing on Embedded Systems with Multiprocessors

Entropy ◽  
2019 ◽  
Vol 21 (3) ◽  
pp. 268 ◽  
Author(s):  
Abraham Flores-Vergara ◽  
Everardo Inzunza-González ◽  
Enrique García-Guerrero ◽  
Oscar López-Bonilla ◽  
Eduardo Rodríguez-Orozco ◽  
...  
Keyword(s):  
Parallel Computing ◽  
Embedded Systems ◽  
Embedded System ◽  
Random Number Generator ◽  
Security Analysis ◽  
Optimal Number ◽  
Practical Applications ◽  
Numerical Precision ◽  
Encryption Method ◽  
Digital Color Images

Profiling and parallel computing techniques in a cluster of six embedded systems with multiprocessors are introduced herein to implement a chaotic cryptosystem for digital color images. The proposed encryption method is based on stream encryption using a pseudo-random number generator with high-precision arithmetic and data processing in parallel with collective communication. The profiling and parallel computing techniques allow discovery of the optimal number of processors that are necessary to improve the efficiency of the cryptosystem. That is, the processing speed improves the time for generating chaotic sequences and execution of the encryption algorithm. In addition, the high numerical precision reduces the digital degradation in a chaotic system and increases the security levels of the cryptosystem. The security analysis confirms that the proposed cryptosystem is secure and robust against different attacks that have been widely reported in the literature. Accordingly, we highlight that the proposed encryption method is potentially feasible to be implemented in practical applications, such as modern telecommunication devices employing multiprocessors, e.g., smart phones, tablets, and in any embedded system with multi-core hardware.

Application of MECHATROLINK-II Fieldbus in Multi-Axis Embedded CNC System

2011 ◽  
Vol 314-316 ◽  
pp. 1695-1701
Author(s):  
Wei Qiang Gao ◽  
Chao Ting Qing ◽  
Ze Hua Hu ◽  
Zou Ya Huang
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Numerical Control ◽  
Control Problems ◽  
Cnc System ◽  
Control Field ◽  
Synchronous Control ◽  
Embedded Cnc ◽  
Transmission Bottleneck

Recently, the application of fieldbus is becoming a trend in the development of CNC system towards decentralisation, network and multi-axis linkage. It is anticipated that fieldbus will be one of the leading technologies in the area of numerical control before long. Meanwhile, embedded system has been widely used in numerical control field to solve the reliability and real-time problems. In order to give full play to the advantages of embedded systems, the MECHATROLINK-II fieldbus is introduced to solve the transmission bottleneck of servo communications and multi-axis synchronous control problems. And it is proved that the application scheme combined fieldbus and embedded system is successful and valid by a large amount of performance testings.

scholarly journals AN APPROACH OF UBIQUITOUS DEVICES USING T-ENGINE IN VIETNAM

2011 ◽  
Vol 14 (4) ◽  
pp. 16-23
Author(s):  
Hung Hoa Nguyen ◽  
Huy Quang Nguyen ◽  
Vu Duc Anh Dinh
Keyword(s):  
Embedded Systems ◽  
Real Time ◽  
Control Mechanism ◽  
Time Constraints ◽  
Development Platform ◽  
Wide Range ◽  
Different Types ◽  
Hardware Platforms ◽  
Automatic Systems ◽  
Additional Hardware

The 21st century is the era of Ubiquitous Computing where computing devices are present everywhere in our lives. To satisfy the development of this tendency, many hardware platforms have been proposed for developing Ubiquitous devices. Among them, T-Engine, an open standardized development platform for embedded systems, is one of the most popular platforrms. It is nowadays compatible with embedded equipments for a wide range of fields. In Vietnam, T-Engine has just been introduced for 4 years. However, most of the ubiquitous applications using T-Engine are developed restrictively based on the standard hardware of T-Engine. One issue that arises is the necessity of a solution to expand T-Engine hardware and use it to control automatic systems to satisfy different types of Ubiquitous devices. This research is to propose an approach to use T-Engine in the Ubiquitous Devices that require the attachment of the additional hardware as well as the complicated control mechanism with real time constraints. In this research, we proposed an expanding solution T-Engine through the extension bus. Besides that, we consider the timing problems in bus transaction and problems in real-time programming. A simple robot demonstration has also been designed and implemented to prove the feasibility of our model. This approach will open up a new tendency of developing complicated Ubiquitous devices using T-Engine in Vietnam.

scholarly journals Open-Source FPGA Coprocessor for the Doppler Emulation of Moving Fluids

Micromachines ◽  
2021 ◽  
Vol 12 (12) ◽  
pp. 1549
Author(s):  
Stefano Ricci
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Open Source ◽  
Real Time ◽  
Field Programmable Gate Array ◽  
Synthetic Signal ◽  
Doppler System ◽  
Wide Range ◽  
Field Programmable ◽  
Moving Fluid

Embedded systems are nowadays employed in a wide range of application, and their capability to implement calculation-intensive algorithms is growing quickly and constantly. This result is obtained by the exploitation of powerful embedded processors that are often connected to coprocessors optimized for a particular application. This work presents an open-source coprocessor dedicated to the real-time generation of a synthetic signal that mimics the echoes produced by a moving fluid when investigated by ultrasounds. The coprocessor is implemented in a Field Programmable Gate Array (FPGA) device and integrated in an embedded system. The system can replace the complex and inaccurate flow-rigs employed in laboratorial tests of Doppler ultrasound systems and methods. This paper details the coprocessor and its standard interfaces, and shows how it can be integrated in the wider architecture of an embedded system. Experiments showed its capability to emulate a fluid flowing in a pipe when investigated by an echographic Doppler system.

scholarly journals A METHOD OF PREDICTING THE MAINTENANCE PERIOD OF EMBEDDED SYSTEMS FOR PREVENTING BREACH OF THEIR TIME REQUIREMENTS

2018 ◽  
pp. 94-101
Author(s):  
Dmytro Fedasyuk ◽  
Tetyana Marusenkova ◽  
Ratybor Chopey
Keyword(s):  
Embedded Systems ◽  
Response Time ◽  
Embedded System ◽  
Real Time ◽  
Execution Time ◽  
Significant Problem ◽  
Maintenance Period ◽  
Time Requirements ◽  
The Embedded System

The work deals with a significant problem of ensuring that the execution time of a firmware running inside a microcontroller-based real-time embedded system never goes out of its expected range, no matter for how long the embedded system has been used. Once having been tested before the first usage, a newly created embedded system is gradually getting slower in its response, due to the fact that its hardware components get worn-out with aging. A possible solution is a replacement of the hardware components that most contribute to such a change in the response time of the embedded system. If such a replacement takes place too far in advance, long before hardware components actually start showing any decline in their response time, the above-mentioned solution is cost-ineffective and impractical, as it leads to a waste of equipment and efforts. We introduce a method for predicting the appropriate maintenance period of a real-time embedded system on the basis of the characteristics of its hardware components.

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