EFFICIENT RECOVERY TECHNIQUE FOR LOW-DENSITY PARITY-CHECK CODES USING REDUCED-SET DECODING

2008 ◽  
Vol 17 (02) ◽  
pp. 333-351 ◽  
Author(s):  
K. M. S. SOYJAUDAH ◽  
P. C. CATHERINE
Keyword(s):  
Ldpc Codes ◽  
Low Density ◽  
Parity Check ◽  
Coding Gain ◽  
Inference Procedure ◽  
Recovery Algorithm ◽  
Low Density Parity Check ◽  
Recovery Technique ◽  
Efficient Recovery ◽  
Parity Check Codes

We introduce a recovery algorithm for low-density parity-check codes that provides substantial coding gain over the conventional method. Concisely, it consists of an inference procedure based on successive decoding rounds using different subsets of bit nodes from the bipartite graph representing the code. The technique also sheds light on certain characteristics of the sum–product algorithm and effectively copes with the problems of trapping sets, cycles, and other anomalies that adversely affect the performance LDPC codes.

scholarly journals A New Reliability Ratio Weighted Bit Flipping Algorithm for Decoding LDPC Codes

2021 ◽  
Vol 2021 ◽  
pp. 1-11
Author(s):  
Chakir Aqil ◽  
Ismail Akharraz ◽  
Abdelaziz Ahaitouf
Keyword(s):  
Gaussian Noise ◽  
Additive White Gaussian Noise ◽  
Ldpc Codes ◽  
Low Density ◽  
Parity Check ◽  
Coding Gain ◽  
Decoding Complexity ◽  
Low Density Parity Check ◽  
Awgn Channel ◽  
Infinite Loop

In this study, we propose a “New Reliability Ratio Weighted Bit Flipping” (NRRWBF) algorithm for Low-Density Parity-Check (LDPC) codes. This algorithm improves the “Reliability Ratio Weighted Bit Flipping” (RRWBF) algorithm by modifying the reliability ratio. It surpasses the RRWBF in performance, reaching a 0.6 dB coding gain at a Binary Error Rate (BER) of 10−4 over the Additive White Gaussian Noise (AWGN) channel, and presents a significant reduction in the decoding complexity. Furthermore, we improved NRRWBF using the sum of the syndromes as a criterion to avoid the infinite loop. This will enable the decoder to attain a more efficient and effective decoding performance.

Performance of IEEE 802.11n LDPC codes

2017 ◽  
Vol 11 (22) ◽  
pp. 1065-1073
Author(s):  
Yenny Alexandra Avendano Martinez ◽  
Octavio Jose Salcedo Parra ◽  
Giovanny Mauricio Tarazona Bermudez
Keyword(s):  
Error Detection ◽  
High Performance ◽  
Ldpc Codes ◽  
Low Density ◽  
Parity Check ◽  
Ieee 802.11N ◽  
Noise Environment ◽  
Low Density Parity Check ◽  
Parity Check Codes

LDPC (Low Density Parity Check Codes) is a set of algorithms that send, receive and correct in a noise environment, frames transmitted in a LAN environment. This article demonstrates the high performance of the LDPC in environments of noise, compared to the CRC error detection code highly currently implemented, in this way the efficiency of LDPC is shown specifically over the 802. 11n protocol.

Modified Bit-Flipping Decoding of Low-Density Parity-Check Codes

2013 ◽  
Vol 710 ◽  
pp. 723-726
Author(s):  
Yuan Hua Liu ◽  
Mei Ling Zhang
Keyword(s):  
High Throughput ◽  
Error Probability ◽  
Ldpc Codes ◽  
Low Complexity ◽  
Low Density ◽  
Parity Check ◽  
Excellent Performance ◽  
Low Density Parity Check ◽  
Lower Complexity ◽  
Parity Check Codes

A novel bit-flipping (BF) algorithm with low complexity for high-throughput decoding of low-density parity-check (LDPC) codes is presented. At each iteration, a novel threshold pattern is used to determine the code bits whether to be flipped or not, and the flipping error probability is effectively decreased. Compared with the weighted BF algorithm and its modifications, the modified BF algorithm has significantly lower complexity and decoding time. Through simulations the proposed BF algorithm is shown to achieve excellent performance and fast convergence speed while maintaining significantly low complexity thus facilitating high-throughput decoding.

Intensity Reflection Coefficient Based Min-Sum Decoding for Low Density Parity Check Codes

Frequenz ◽  
2012 ◽  
Vol 66 (7-8) ◽  
Author(s):  
Mohammad Rakibul Islam ◽  
Khandaker Sultan Mahmood ◽  
Md. Farhan Tasnim Oshim ◽  
Md. Moshiur Rahman Farazi
Keyword(s):  
Reflection Coefficient ◽  
Ldpc Codes ◽  
Superior Performance ◽  
Low Density ◽  
Parity Check ◽  
Factor Intensity ◽  
Concatenated Coding ◽  
Low Density Parity Check ◽  
Parity Check Codes ◽  
Intensity Reflection

AbstractLow Density Parity Check Codes (LDPC) give groundbreaking performance which is known to approach Shannon’s limits for sufficiently large block length. Historically and recently, LDPC have been known to give superior performance than concatenated coding. In the following paper, a proposal to modify the standard Min-Sum (MS) algorithm for decoding LDPC codes is presented. This is done by introduction of a factor, intensity reflection coefficient (IRC),

scholarly journals A weighted group shuffled decoding for low-density parity-check codes

2022 ◽  
Vol 25 (1) ◽  
pp. 375
Author(s):  
Fatima Zahrae Zenkouar ◽  
Mustapha El Alaoui ◽  
Said Najah
Keyword(s):  
Belief Propagation ◽  
Ldpc Codes ◽  
Low Density ◽  
Parity Check ◽  
Exponential Form ◽  
Exponential Factor ◽  
Short Cycle ◽  
Low Density Parity Check ◽  
Suggested Technique ◽  
Parity Check Codes

In this paper, we have developed several concepts such as the tree concept, the short cycle concept and the group shuffling concept of a propagation cycle to decrypt low-density parity-check (LDPC) codes. Thus, we proposed an algorithm based on group shuffling propagation where the probability of occurrence takes exponential form exponential factor appearance probability belief propagation-group shuffled belief propagation (EFAP-GSBP). This algorithm is used for wireless communication applications by providing improved decryption performance with low latency. To demonstrate the effectiveness of our suggested technique EFAP-GSBP, we ran numerous simulations that demonstrated that our algorithm is superior to the traditional BP/GSBP algorithm for decrypting LPDC codes in both regular and non-regular forms

A Soft-Input Soft-Output Decoding Algorithm for LDPC Codes Based on Euclidean Distance

2011 ◽  
Vol 63-64 ◽  
pp. 999-1004
Keyword(s):  
Euclidean Distance ◽  
Ldpc Codes ◽  
Low Density ◽  
Parity Check ◽  
Extended Form ◽  
Decoding Algorithm ◽  
Low Density Parity Check ◽  
Parity Check Codes

Paper has been removed due to plagiarism. The original paper was in an extended form in: Published in IET Communications, Vol 5, Issue 16, pp 2364-2370, 2011 Received on 23rd November 2010 Revised on 21st April 2011 doi: 10.1049/iet-com.2010.1040 Euclidean distance soft-input soft-output decoding algorithm for low-density parity-check codes P.G. Farrell1, L.J. Arnone, J. Castineira Moreira

Low Density Parity-Check Codes Based on Affine Permutation Matrices

2020 ◽  
pp. 2158002
Author(s):  
Wang Zhongxun ◽  
Sun Ling ◽  
Xi Yang
Keyword(s):  
Hamming Distance ◽  
Ldpc Codes ◽  
Low Density ◽  
Parity Check ◽  
Permutation Matrices ◽  
Low Density Parity Check ◽  
Minimum Hamming Distance ◽  
New Codes ◽  
Parity Check Codes ◽  
Better Than

Recently, Low Density Parity-Check (LDPC) codes based on Affine Permutation Matrices (APM) drew lots of attention. Compared with the Quasi-Cyclic LDPC (QC-LDPC) codes, these kinds of codes have some advantages. APM-LDPC codes obtain lower cycle-distributions, minimum hamming distance and greater girth. This paper explains the importance of cyclic distribution by comparing APM-LDPC codes with QC-LDPC codes. Then a particular form of APM-LDPC codes is proposed and researched. The new codes can low down the cycle-distribution to larger extent. In the following research, an effective method, which constructs the new codes with fixed girth, is proposed. Simulations show that the construction method is reasonable and effective. The transmission performances are better than the traditional methods, as well. Finally, the implementation and verification are carried out on FPGA.

Pipeline processing in low-density parity-check codes hardware decoder

2011 ◽  
Vol 59 (2) ◽  
pp. 149-155 ◽  
Author(s):  
W. Sułek
Keyword(s):  
Ldpc Codes ◽  
Optimization Method ◽  
Low Density ◽  
Parity Check ◽  
Parity Check Matrix ◽  
Matrix Optimization ◽  
Low Density Parity Check ◽  
Check Matrix ◽  
Pipeline Processing ◽  
Parity Check Codes

Pipeline processing in low-density parity-check codes hardware decoderLow-Density Parity-Check (LDPC) codes are one of the best known error correcting coding methods. This article concerns the hardware iterative decoder for a subclass of LDPC codes that are implementation oriented, known also as Architecture Aware LDPC. The decoder has been implemented in a form of synthesizable VHDL description. To achieve high clock frequency of the decoder hardware implementation - and in consequence high data-throughput, a large number of pipeline registers has been used in the processing chain. However, the registers increase the processing path delay, since the number of clock cycles required for data propagating is increased. Thus in general the idle cycles must be introduced between decoding subiterations. In this paper we study the conditions for necessity of idle cycles and provide a method for calculation the exact number of required idle cycles on the basis of parity check matrix of the code. Then we propose a parity check matrix optimization method to minimize the total number of required idle cycles and hence, maximize the decoder throughput. The proposed matrix optimization by sorting rows and columns does not change the code properties. Results, presented in the paper, show that the decoder throughput can be significantly increased with the proposed optimization method.

GRAPHICAL QUANTUM LOW-DENSITY PARITY-CHECK CODES

2012 ◽  
Vol 26 (20) ◽  
pp. 1250118
Author(s):  
YUAN LI ◽  
MANTAO XU ◽  
YINKUO MENG ◽  
YING GUO
Keyword(s):  
Error Correction ◽  
Fast Algorithm ◽  
Ldpc Codes ◽  
Quantum Codes ◽  
Error Correction Codes ◽  
Low Density ◽  
Parity Check ◽  
Graphical Approach ◽  
Low Density Parity Check ◽  
Parity Check Codes

Graphical approach provides a direct way to construct error correction codes. Motivated by its good properties, associating low-density parity-check (LDPC) codes, in this paper we present families of graphical quantum LDPC codes which contain no girth of four. Because of the fast algorithm of constructing for graphical codes, the proposed quantum codes have lower encoding complexity.

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