HOT CARRIER EFFECTS ON JITTER PERFORMANCE IN CMOS VOLTAGE-CONTROLLED OSCILLATORS

2006 ◽  
Vol 06 (03) ◽  
pp. L329-L334 ◽  
Author(s):  
CHI ZHANG ◽  
ASHOK SRIVASTAVA

The effects of hot carrier stress on CMOS voltage-controlled oscillators (VCO) are investigated. A model of the threshold voltage degradation in MOSFETs due to hot carrier stress has been used to model jitter in voltage-controlled oscillators. The relation between the stress time which induces the hot carrier effects due to generation of interface traps near the drain of the n-MOSFETs, and the degradation of the VCO performance is presented. The VCO performance degradation takes into consideration decrease in operation frequency and increase in jitter. The experimental circuits have been designed in 0.5 μm n-well CMOS technology for operation at 3 V. Experimental results show that after four hours hot-carrier stress the jitter is increased by 40 ps for single-ended current starved VCOs.

Electronics ◽  
2018 ◽  
Vol 7 (12) ◽  
pp. 427 ◽  
Author(s):  
Alejandro Campos-Cruz ◽  
Guillermo Espinosa-Flores-Verdad ◽  
Alfonso Torres-Jacome ◽  
Esteban Tlelo-Cuautle

Currently, researchers face new challenges in order to compensate or even reduce the noxious phenomenon known as bias-temperature instability (BTI) that is present in modern metal-oxide-semiconductor (MOS) technologies, which negatively impacts the performance of semiconductor devices. BTI remains a mystery in the way that it evolves in time, as well as the responsible mechanisms for its appearance and the further degradation it produces on MOS devices. The BTI phenomenon is usually associated with an increase of MOS transistor’s threshold voltage; however, this work also addresses BTI as a change in MOSFET’s drain current, transconductance, and the channel’s resistivity. In this way, we detail a physics-based model to get a better insight into the prediction of threshold voltage degradation for aging ranges going from days to years, in 180-nm MOS technology. We highlight that a physics-based BTI model improves accuracy in comparison to lookup table models. Finally, simulation results for the inclusion of such a physics-based BTI model into BSIM3v3 are shown in order to get a better understanding of how BTI impacts the performance of MOS devices.


2019 ◽  
Vol 53 (8) ◽  
pp. 085104 ◽  
Author(s):  
Jingjing Shao ◽  
Wan-Ching Su ◽  
Ting-Chang Chang ◽  
Hong-Chih Chen ◽  
Kuan-Ju Zhou ◽  
...  

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