IMPLEMENTATION OF ZERO TREE WAVELET CODERS IN DSP PROCESSOR
With the fast evolution of Multimedia systems, Image compression algorithms are very much needed to achieve effective transmission and compact storage by removing the redundant information of the image data. Wavelet transforms have received significant attention, recently, due to their suitability for a number of important signal and image compression applications and the lapped nature of this transform and the computational simplicity, which comes in the form of filter bank implementations. In this paper, the implementation of image compression algorithms based on discrete wavelet transform such as embedded zero tree wavelet (EZW) coder, set partitioning in hierarchical trees coder without lists (SPIHT — No List) and packetizable zero tree wavelet (PZW) coder in DSP processor is dealt in detail and their performance analysis is carried out in terms of different compression ratios, execution timing and for different packet losses. PSNR is used as the criteria for the measurement of reconstructed image quality.