scholarly journals Bounding the Output Error in a Buck Power Converter Using Perturbation Theory

2008 ◽  
Vol 2008 ◽  
pp. 1-20 ◽  
Author(s):  
Fabiola Angulo ◽  
Enric Fossas ◽  
Tere M. Seara ◽  
Gerard Olivar
Keyword(s):  
Perturbation Theory ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Dynamic Control ◽  
Power Converter ◽  
Control Technique ◽  
Order System ◽  
Sliding Surface ◽  
Output Error ◽  
Average Theory

We show the main results obtained when applying the average theory to Zero Average Dynamic control technique in a buck power converter with pulse-width modulation (PWM). In particular, we have obtained the bound values for output error and sliding surface. The PWM with centered and lateral pulse configurations were analyzed. The analytical results have confirmed the numerical and experimental results already obtained in previous publications. Moreover, through an important lemma, we have generalized the theory for any stable second-order system with relative degree 2, using properties related to transformations and stability of linear systems.

ASIC and FPGA based DPWM architectures for single-phase and single-output DC-DC converter: a review

2013 ◽  
Vol 3 (4) ◽  
Author(s):  
Subhash Chander ◽  
Pramod Agarwal ◽  
Indra Gupta
Keyword(s):  
Digital Control ◽  
Pulse Width ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Power Converter ◽  
Comparative Performance ◽  
Single Output ◽  
Digital Pulse

AbstractPulse width modulation (PWM) has been widely used in power converter control. This paper presents a review of architectures of the Digital Pulse Width Modulators (DPWM) targeting digital control of switching DC-DC converters. An attempt is made to review the reported architectures with emphasis on the ASIC and FPGA implementations in single phase and single-output DC-DC converters. Recent architectures using FPGA’s advanced resources for achieving the resolution higher than classical methods have also been discussed. The merits and demerits of different architectures, and their relative comparative performance, are also presented. The Authors intention is to uncover the groundwork and the related references through this review for the benefit of readers and researchers targeting different DPWM architectures for the DC-DC converters.

scholarly journals Hardware implementation and performance evaluation of microcontroller-based 7-level inverter using POD-SPWM technique

2021 ◽  
Vol 23 (1) ◽  
pp. 120
Author(s):  
Hajar Chadli ◽  
Sara Chadli ◽  
Mohamed Boutouba ◽  
Mohammed Saber ◽  
Abdelwahed Tahani
Keyword(s):  
Renewable Energy ◽  
Pulse Width Modulation ◽  
Control Method ◽  
Renewable Energy Sources ◽  
Power Converter ◽  
Control Technique ◽  
Natural Processes ◽  
Laboratory Setup ◽  
And Performance

Renewable energy sources are considered as inexhaustible sources for the very long-term, as they come from natural processes that are constantly replenished. However, there are a number of challenges facing renewable energy technology adoption, like the grid connecting problems. One of the main challenges relates to the grid connecting problem is the power quality issues for power converter, such as harmonics, voltage stability, and frequency fluctuation. Hence, the inverter remains the first element to be built because of its undeniable advantages in alternative continuous conversion. However, it has some disadvantages such as high component count and complex control method. This paper presents the design and implementation of a new 7-level inverter architecture with only six switches. This architecture requires fewer components compared to other 7-level inverter topologies therefore, the overall cost, control technique complexity, and conduction losses are highly reduced. A digital phase opposition disposition sinusoidal pulse width modulation (POD-SPWM) strategy using the Arduino is adopted to improve the performance of the proposed multilevel inverter (MLI) which leads to further reduction in total harmonic sistortion (THD). In this paper, the proposed inverter is tested using Proteus software and Matlab Simulink. Finally, a laboratory setup of the proposed inverter was built to validate its workability by the experimental results.

Desing and Implementation of a Microcontroller Based Buck Boost Converter as a Smooth Starter for Permanent Magnet Motor

2016 ◽  
Vol 1 (3) ◽  
pp. 566
Author(s):  
S. Ravi ◽  
Vitaliy Mezhuyev ◽  
K. Iyswarya Annapoorani ◽  
P. Sukumar
Keyword(s):  
Permanent Magnet ◽  
Input Signal ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Power Converter ◽  
Boost Converter ◽  
Buck Converter ◽  
Permanent Magnet Motor ◽  
Dc Power ◽  
The Given

<p>This proposal proposes a DC/DC Buck Boost converter which has been used as a smooth starter for a DC Permanent Magnet Motor. In the existing system the DC/DC Buck Converter is used which provide the output less than the input Signal. Using buck converter it is difficult to increase the value of the input signal. Hence DC/DC Buck- Boost Converter used from which it is possible to get both the increased and decreased output from the given input. Previously pulse width modulation signals with respective to motor voltage is used. However they produce variations in the voltage and current of the motor. The above problem is overcome by using DC/DC Power converter. The proposed system with reduction in size, reduced ripples and increase in speed makes the system to operate at both low and high power applications. The proposed system results in higher efficiency, reduces the ripple content and the stress. The results are validated through MATLAB/Simulink and real time implementation.</p>

scholarly journals Fault-Tolerant Control Strategy for Neutral-Point-Clamped Three-Level Inverter

2018 ◽  
Vol 2018 ◽  
pp. 1-9
Author(s):  
Yanxia Shen ◽  
Beibei Miao ◽  
Dinghui Wu ◽  
Kader Ali Ibrahim
Keyword(s):  
Control Strategy ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Fault Tolerant ◽  
Fault Tolerant Control ◽  
Open Circuit ◽  
Neutral Point ◽  
Control Technique ◽  
Action Time ◽  
Addition And Subtraction

A fault-tolerant control technique is discussed for the Neutral-Point-Clamped (NPC) three-level inverter, which ensures that the NPC inverter operates normally even under device failures. A two-level leg is added to the NPC inverter; when the device open circuit fault occurs, the load of this faulty phase is connected to the neutral point of this two-level leg through the bidirectional thyristors. An improved Space Vector Pulse Width Modulation (SVPWM) strategy called “addition and subtraction substitution SVPWM” is proposed to effectively suppress fluctuation in capacitor neutral-point voltages by readjusting the sequence and action time of voltage vectors. The fault-tolerant topology in this paper has the advantages of fewer switching devices and lower circuit costs. Experimental results show that the proposed fault-tolerant system can operate in balance of capacitor neutral-point voltages at full output power and the reliability of the inverter is greatly enhanced.

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