scholarly journals Chemical-Vapor-Deposited Graphene as Charge Storage Layer in Flash Memory Device

2016 ◽  
Vol 2016 ◽  
pp. 1-6 ◽  
Author(s):  
W. J. Liu ◽  
L. Chen ◽  
P. Zhou ◽  
Q. Q. Sun ◽  
H. L. Lu ◽  
...  
Keyword(s):  
Flash Memory ◽  
Room Temperature ◽  
Metal Layer ◽  
Chemical Vapor ◽  
Charge Trapping ◽  
Memory Device ◽  
Water Molecules ◽  
Oh Groups ◽  
Chemical Vapor Deposited ◽  
A Charge

We demonstrated a flash memory device with chemical-vapor-deposited graphene as a charge trapping layer. It was found that the average RMS roughness of block oxide on graphene storage layer can be significantly reduced from 5.9 nm to 0.5 nm by inserting a seed metal layer, which was verified by AFM measurements. The memory window is 5.6 V for a dual sweep of ±12 V at room temperature. Moreover, a reduced hysteresis at the low temperature was observed, indicative of water molecules or −OH groups between graphene and dielectric playing an important role in memory windows.

The Study on Charge-trapping Mechanism in Nitride Storage Flash Memory Device

2007 ◽  
Vol 997 ◽  
Author(s):  
Jia-Lin Wu ◽  
Hua-Ching Chien ◽  
Chi-Kuang Chang ◽  
Chien-Wei Liao ◽  
Chih-Yuan Lee ◽  
...  
Keyword(s):  
Flash Memory ◽  
Chemical Vapor ◽  
Charge Trapping ◽  
Memory Device ◽  
Lateral Distribution ◽  
Hot Electron ◽  
Trapping Level ◽  
Composition Ratio ◽  
Trapping Mechanism ◽  
Vertical Location

AbstractIn this work, the charge-trapping distributions of polysilicon-oxide-nitride-oxide-silicon (SONOS) structure are studied. The trapping energy level of SiNx films with different composition ratio deposited by low-pressure chemical vapor deposition (LPCVD) were first characterized by photoluminescence (PL) measurement. Moreover, using F-N/CHE program and charge pumping techniques, the vertical location and the lateral distribution of programmed charges are investigated in the nitride films with different composition ratio. The study offers strong evidence that the density of charge-trapping levels in the Si-rich nitride is higher than the standard nitride. A simple qualitative model and calculation explains that the trapping level distributions in the SiNx films are shallower by increasing relative Si-content. Furthermore, we have observed the nitride trap vertical location was changed by adjusted Si/N composition ratio. And the lateral distribution of hot electron programmed charges in the modified nitride is broader than that in the standard nitride because it offered more charge-trapping sites and shallower charge-trapping levels. In summary, the study can help researchers to understand the nitride charge-trapping mechanism and the analysis of optical/electrical characteristics.

Flash memory based on solution processed hafnium dioxide charge trapping layer

2014 ◽  
Vol 2 (21) ◽  
pp. 4233-4238 ◽  
Author(s):  
Jiaqing Zhuang ◽  
Su-Ting Han ◽  
Ye Zhou ◽  
V. A. L. Roy
Keyword(s):  
Flash Memory ◽  
Sol Gel ◽  
Charge Trapping ◽  
Hafnium Dioxide ◽  
Solution Processed ◽  
Gel Technique ◽  
A Charge

Hafnium dioxide (HfO2) film prepared by the sol–gel technique has been used as a charge trapping layer in organic flash memory.

Enhanced Programming and Erasing Speeds in P-Channel Charge-Trapping Flash Memory Device With SiGe Buried Channel

2012 ◽  
Vol 33 (9) ◽  
pp. 1264-1266 ◽  
Author(s):  
Li-Jung Liu ◽  
Kuei-Shu Chang-Liao ◽  
Yi-Chuen Jian ◽  
Jen-Wei Cheng ◽  
Tien-Ko Wang ◽  
...  
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Buried Channel

scholarly journals Nb2O5 and Ti-Doped Nb2O5 Charge Trapping Nano-Layers Applied in Flash Memory

Nanomaterials ◽  
2018 ◽  
Vol 8 (10) ◽  
pp. 799 ◽  
Author(s):  
Jer Wang ◽  
Chyuan Kao ◽  
Chien Wu ◽  
Chun Lin ◽  
Chih Lin
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Dielectric Constants ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Hysteresis Curve ◽  
Band Shift ◽  
K Value ◽  
High K

High-k material charge trapping nano-layers in flash memory applications have faster program/erase speeds and better data retention because of larger conduction band offsets and higher dielectric constants. In addition, Ti-doped high-k materials can improve memory device performance, such as leakage current reduction, k-value enhancement, and breakdown voltage increase. In this study, the structural and electrical properties of different annealing temperatures on the Nb2O5 and Ti-doped Nb2O5(TiNb2O7) materials used as charge-trapping nano-layers in metal-oxide-high k-oxide-semiconductor (MOHOS)-type memory were investigated using X-ray diffraction (XRD) and atomic force microscopy (AFM). Analysis of the C-V hysteresis curve shows that the flat-band shift (∆VFB) window of the TiNb2O7 charge-trapping nano-layer in a memory device can reach as high as 6.06 V. The larger memory window of the TiNb2O7 nano-layer is because of a better electrical and structural performance, compared to the Nb2O5 nano-layer.

Enhanced Programming and Erasing Speeds of Charge-Trapping Flash Memory Device With Ge Channel

2015 ◽  
Vol 36 (12) ◽  
pp. 1314-1317 ◽  
Author(s):  
Zong-Hao Ye ◽  
Kuei-Shu Chang-Liao ◽  
Li-Jung Liu ◽  
Jen-Wei Cheng ◽  
Hsin-Kai Fang
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Device

Impacts of Electrical Field in Tunneling Layer on Operation Characteristics of Poly-Ge Charge-Trapping Flash Memory Device

2020 ◽  
Vol 41 (12) ◽  
pp. 1766-1769
Author(s):  
Hsin-Kai Fang ◽  
Kuei-Shu Chang-Liao ◽  
Kuan-Chi Chou ◽  
Tzu-Cheng Chao ◽  
Jung-En Tsai ◽  
...  
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Electrical Field ◽  
Operation Characteristics

Characteristics of a sensitive micro-Hall probe fabricated on chemical vapor deposited graphene over the temperature range from liquid-helium to room temperature

2011 ◽  
Vol 99 (11) ◽  
pp. 112107 ◽  
Author(s):  
Chiu-Chun Tang ◽  
Ming-Yang Li ◽  
L. J. Li ◽  
C. C. Chi ◽  
J. C. Chen
Keyword(s):  
Liquid Helium ◽  
Room Temperature ◽  
Chemical Vapor ◽  
Hall Probe ◽  
Temperature Range ◽  
Chemical Vapor Deposited

High-κ HfO2/Al2O3 nanolaminated charge trapping layers for high performance flash memory device applications

2006 ◽  
Author(s):  
S. Maikap ◽  
P. J. Tzeng ◽  
T.-Y. Wang ◽  
C. H. Lin ◽  
H. Y. Lee ◽  
...  
Keyword(s):  
Flash Memory ◽  
High Performance ◽  
Charge Trapping ◽  
Memory Device ◽  
Device Applications

Enhanced Operation Characteristics in Poly-Si Nanowire Charge-Trapping Flash Memory Device With SiGe Buried Channel

2014 ◽  
Vol 35 (10) ◽  
pp. 1025-1027 ◽  
Author(s):  
Chun-Yuan Chen ◽  
Kuei-Shu Chang-Liao ◽  
Li-Jung Liu ◽  
Wei-Chieh Chen ◽  
Tien-Ko Wang
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Si Nanowire ◽  
Buried Channel ◽  
Operation Characteristics
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