scholarly journals Design of on-chip temperature-based digital signal processing for customized wireless microcontroller

Author(s):  
S.F. R. Faezal ◽  
M. N. Isa ◽  
S. Taking ◽  
S. N. Mohyar ◽  
A. B. Jambek ◽  
...  

<span>Dramatic rises in power density and die sizes inside system-on-chip (SoC) design have led to the thermal issue. High temperatures or uneven temperature distributions may result not only in reliability issues, also has become the biggest issue that can limit the system performance.  This paper presents the design and simulation of a temperature-based digital signal processing unit for modern system-on-chip design using the Verilog HDL. This design provides continuous monitoring of temperature and reacts to specified conditions. The simulation of the system has been done on Synopsys Software. The result showed that temperature monitoring process is within the temperature range due to the incorporation of an interrupt-based system and with an advantage of minimum chip area required.</span>

2014 ◽  
Vol 668-669 ◽  
pp. 857-861
Author(s):  
Peng Fei Hu ◽  
Yu Xiang Yuan ◽  
Zhi Juan Qu ◽  
Xue Ping Jiang

To improve the reliability and integration of relay protection devices in power, the system on chip design for multi-principle of relay protection on FPGA is proposed. The data acquisition, digital signal processing, hardware protection algorithm, FPGA and MCU process scheduling, MCU and peripheral devices communication are designed, the hardware compilation model is set up by QuartusII on FPGA, and the simulation and experimental verification are performed. The results show that the proposed system can improve the speed of hardware protection and reduce the volume of the device, and has reconstruction on architecture.


2020 ◽  
Vol 20 (1) ◽  
pp. 24-34
Author(s):  
A. N. Ragozin ◽  

n order to detect anomalies and improve the quality of forecasting dynamic data flows observed from sensors in Industrial Control System (ACS)., it is proposed to use a predictive mod-ule consisting of a series-connected digital signal processing unit (DSP) and a predictive unit using a neural network (predictive autoencoder ( Auto Encoder), predictive Autoencoder (PAE)). The study showed that the preliminary DSP block of the predicted input signal, consisting of a parallel set (comb) of digital low-pass filters with finite impulse responses (FIR-LPF), leads to a non-equilibrium account of the correlation relationships of the time samples of the input signal and to increase the accuracy of the final prediction result. The predicted autoencoder (PAE) pro-posed and considered in the work, in addition to restoring the input signal or part of the input signal at the PAE output, also generates the predicted samples of the input signal for the speci-fied number of «forward» time steps at the output, which increases the accuracy of the predic-tion result. The reduction of the forecast error occurs due to the imposition of restrictions in the formation of the forecast, that is, an additional requirement to restore the input samples of the samples – «stabilizers» at the NS output. The introduction of «stabilizers» increases the accuracy of the prediction result.


2014 ◽  
Vol 9 (3) ◽  
pp. 11-19
Author(s):  
Petr Zubarev ◽  
Svetlana Ivanenko ◽  
Alina Ivanova ◽  
Andrey Kvashnin ◽  
Aleksandr Kotelnikov ◽  
...  

In this paper, digital analyzer of diamond detector signals of ITER Vertical Neutron Camera (ITER VNC) are described, which uses digital signal processing. Digital analyzer of pulse signals is based on ADC12500PXIe (two channels, 12 bit, 500 MHz, PXI Express), which satisfies the ITER VNC requirements. In this paper, the architecture of digital signal processing unit is given. Trapezoidal digital shaper for pile-up separation and energy spectrum unit are described. In addition, structure of digital analyzer software levels are considered


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