Design of High Performance Low-Noise Amplifier Circuit Based on Complementary Metal Oxide Semiconductor Technology

2021 ◽  
Vol 16 (4) ◽  
pp. 559-564
Author(s):  
Chao Huang ◽  
Wan-Jun Yin

This paper designs a body-biased (BB) differential cascode low-noise amplifier (LNA) with current bias (CR) and capacitor cross-coupling (CCC) technology that meets the bandwidth requirements of 5 GHz wireless applications. In the design, the CCC technology in the differential cascode topology is used to effectively suppress the common mode noise, thereby improving the noise figure. The series resonant network eliminates parasitic capacitance at the input and output ends, thereby improving the power transmission efficiency. The CR technology formed by the intermediate capacitor shares the DC current input to the output device, thereby increasing the gain. This paper uses BB technology in the design to lower the threshold of the cascode device and improve the transconductance, which further improves the gain and reduces the power consumption. The CCC technology used in the paper improves linearity by eliminating the non-linear components present in the input device, which will not interfere with the transconductance of the output stage. This article has obtained excellent performance parameters including gain, noise figure (NF) and linearity without affecting the power consumption, integration and cost of the proposed design.

2020 ◽  
Vol 2020 ◽  
pp. 1-12
Author(s):  
Hemad Heidari Jobaneh

The calculation and design of an ultralow-power Low Noise Amplifier (LNA) are proposed in this paper. The LNA operates from 5 GHz to 10 GHz, and forward body biasing technique is used to bring down power consumption of the circuit. The design revolves around precise calculations related to input impedance, output impedance, and the gain of the circuit. MATLAB and Advanced Design System (ADS) are utilized to design and simulate the LNA. In addition, TSMC 0.13 μm CMOS process is used in ADS. The LNA is biased with two different voltage supplies in order to reduce power consumption. Noise Figure (NF), input matching (S11), gain (S21), IIP3, and power dissipation are 1.46 dB–2.27 dB, −11.25 dB, 13.82 dB, −8.5, and 963 μW, respectively.


2018 ◽  
Vol 7 (3.6) ◽  
pp. 84
Author(s):  
N Malika Begum ◽  
W Yasmeen

This paper presents an Ultra-Wideband (UWB) 3-5 GHz Low Noise Amplifier (LNA) employing Chebyshev filter. The LNA has been designed using Cadence 0.18um CMOS technology. Proposed LNA achieves a minimum noise figure of 2.2dB, power gain of 9dB.The power consumption is 6.3mW from 1.8V power supply.  


Author(s):  
T. Kanthi ◽  
D. Sharath Babu Rao

This paper is about Low noise amplifier topologies based on 0.18µm CMOS technology. A common source stage with inductive degeneration, cascode stage and folded cascode stage is designed, simulated and the performance has been analyzed. The LNA’s are designed in 5GHz. The LNA of cascode stage of noise figure (NF) 2.044dB and power gain 4.347 is achieved. The simulations are done in cadence virtuoso spectre RF.


2021 ◽  
Vol 18 (4) ◽  
pp. 1327-1330
Author(s):  
S. Manjula ◽  
R. Karthikeyan ◽  
S. Karthick ◽  
N. Logesh ◽  
M. Logeshkumar

An optimized high gain low power low noise amplifier (LNA) is presented using 90 nm CMOS process at 2.4 GHz frequency for Zigbee applications. For achieving desired design specifications, the LNA is optimized by particle swarm optimization (PSO). The PSO is successfully implemented for optimizing noise figure (NF) when satisfying all the design specifications such as gain, power dissipation, linearity and stability. PSO algorithm is developed in MATLAB to optimize the LNA parameters. The LNA with optimized parameters is simulated using Advanced Design System (ADS) Simulator. The LNA with optimized parameters produces 21.470 dB of voltage gain, 1.031 dB of noise figure at 1.02 mW power consumption with 1.2 V supply voltage. The comparison of designed LNA with and without PSO proves that the optimization improves the LNA results while satisfying all the design constraints.


Author(s):  
Abu Bakar Ibrahim ◽  
Ahmad Zamzuri Mohamad Ali

<p>Advancement in the wireless industry, internet access without borders and increasing demand for high data rate wireless digital communication moving us toward the optimal development of communication technology. Wireless communication is a technology that plays an important role in current technology transformation. Broadband communication is a method of telecommunication that are available for transmitting large amounts of data, voice and video over long distance using different frequencies. Specifically, Low Noise Amplifier which is located at the first block of receiver system, makes it one of the important element in improving signal transmition. This study was aimed to design a microwave Low Noise Amplifier for wireless application that will work at 5.8 GHz using  high-performance low noise superHEMT transistor FHX76LP manufactured by Eudyna Technologies. The low noise amplifier (LNA) produced gain of 16.8 dB and noise figure (NF) of 1.20 dB. The input reflection (S<sub>11</sub>) and output return loss (S<sub>22</sub>) are -10.5 dB and -13.3 dB respectively. The bandwidth of the amplifier recorded is 1.2 GHz. The input sensitivity is compliant with the IEEE 802.16 standards.</p>


Author(s):  
T. Kanthi ◽  
D. Sharath Babu Rao

This paper is about Low noise amplifier topologies based on 0.18µm CMOS technology. A common source stage with inductive degeneration, cascode stage and folded cascode stage is designed, simulated and the performance has been analyzed. The LNA’s are designed in 5GHz. The LNA of cascode stage of noise figure (NF) 2.044dB and power gain 4.347 is achieved. The simulations are done in cadence virtuoso spectre RF.


2019 ◽  
Vol 33 (32) ◽  
pp. 1950396 ◽  
Author(s):  
Benqing Guo ◽  
Hongpeng Chen ◽  
Xuebing Wang ◽  
Jun Chen ◽  
Xianbin Xie ◽  
...  

In this paper, a 60 GHz complementary metal-oxide-semiconductor (CMOS) balun low-noise amplifier (LNA) was implemented for millimeter-wave communication. To improve the gain and noise performance, slow-wave coplanar waveguides (S-CPW) with high quality factor were designed as input, output, and inter-stage matching networks. At the input port, a balun transformer provides additional passive gain while performing the singled-ended to differential conversion. Implemented in a 28-nm CMOS process, simulated results show that the proposed LNA exhibits a simulated linear gain of 16 dB and a noise figure of 5.6 dB at 60 GHz, with a 3-dB gain bandwidth of 5 GHz (58 GHz–63 GHz). The input return loss is better than −25 dB at the central frequency. The simulated input third-order intercept point (IIP3) is −5 dBm. The circuit draws 35 mA from 1 V supply voltage.


Author(s):  
Abu Bakar Ibrahim ◽  
Ahmad Zamzuri Mohamad Ali

<p>Advancement in the wireless industry, internet access without borders and increasing demand for high data rate wireless digital communication moving us toward the optimal development of communication technology. Wireless communication is a technology that plays an important role in current technology transformation. Broadband communication is a method of telecommunication that are available for transmitting large amounts of data, voice and video over long distance using different frequencies. Specifically, Low Noise Amplifier which is located at the first block of receiver system, makes it one of the important element in improving signal transmition. This study was aimed to design a microwave Low Noise Amplifier for wireless application that will work at 5.8 GHz using  high-performance low noise superHEMT transistor FHX76LP manufactured by Eudyna Technologies. The low noise amplifier (LNA) produced gain of 16.8 dB and noise figure (NF) of 1.20 dB. The input reflection (S<sub>11</sub>) and output return loss (S<sub>22</sub>) are -10.5 dB and -13.3 dB respectively. The bandwidth of the amplifier recorded is 1.2 GHz. The input sensitivity is compliant with the IEEE 802.16 standards.</p>


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