A Note on Inelastic Response Spectra for Systems with Bilinear Spring Force and Kinematic Strain-Hardening

1992 ◽  
Vol 8 (2) ◽  
pp. 181-200 ◽  
Author(s):  
L. A. de Béjar ◽  
K. Ganapathi

Parametric studies on inelastic response spectra for systems with bilinear spring resistance and kinematic strain-hardening, low-to-moderate viscous damping, and standing on firm soil, indicate that aseismic design of such systems based on the associated elasto-plastic spectra is not always conservative, in particular, for systems in the intermediate frequency range. By contrast, present understanding of the effect of viscous damping on inelastic spectra is thoroughly verified. In addition, mathematical expressions for a tripartite model of design spectra for inelastic systems are presented and tested for a ground motion record representative of a major destructive earthquake. These formulas provide generally conservative estimates of parameters of response for undamped systems, as compared with both numerically generated spectra and spectral upper bounds previously reported in the literature; however, for damped systems, the inelastic design spectra provide safe envelopes for most of the frequency range, but often make unconservative predictions over a small portion of the intermediate frequency range.

1957 ◽  
Vol 24 (1) ◽  
pp. 53-54
Author(s):  
R. L. Sharma

Abstract The results of computations of frequencies of axially symmetric flexural vibrations of circular disks are given for an intermediate frequency range and for several values of Poisson’s ratio.


2013 ◽  
Vol 2013 ◽  
pp. 1-8 ◽  
Author(s):  
Bo Zhou ◽  
Kun Zhang ◽  
Wenbiao Zhou ◽  
Yanjun Zhang ◽  
Dake Liu

The carrier-frequency (CF) and intermediate-frequency (IF) pulse-width modulators (PWMs) based on delay lines are proposed, where baseband signals are conveyed by both positions and pulse widths or densities of the carrier clock. By combining IF-PWM and precorrected CF-PWM, a fully digital transmitter with unit-delay autocalibration is implemented in 180 nm CMOS for high reconfiguration. The proposed architecture achieves wide CF range of 2 M–1 GHz, high power efficiency of 70%, and low error vector magnitude (EVM) of 3%, with spectrum purity of 20 dB optimized in comparison to the existing designs.


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