scholarly journals Reconfigurable on-chip communication link for efficient communication

2018 ◽  
Vol 7 (2-1) ◽  
pp. 417
Author(s):  
Beulah Hemalatha S ◽  
Vigneswaran T
Keyword(s):  
Genetic Algorithm ◽  
Power Consumption ◽  
Low Power ◽  
Optimization Problems ◽  
Research Area ◽  
Low Power Consumption ◽  
Communication Link ◽  
Simulated System ◽  
Efficient Communication ◽  
On Chip

Application specific reconfiguration of On-chip communication link is a fast growing research area in system on chip (SoC) based system design. Optimization of the communication link is important to achieve a trade-off between efficient communication and low power consumption. So achieving both efficient communication and low power consumption requires a special optimization mechanism. Such Optimization problems can be solved using a genetic algorithm. Here, in this paper genetic algorithm based On-chip communication link reconfiguration is presented. The algorithm will optimize efficiency of communication link with constrain of low power consumption. The parameters involved in power consumption and efficient communication link are coded in the chromosomes. By evolutionary iteration the optimal parameters of the communication link are derived that is used for the communication link successfully in the simulated system. The performance of the simulated system is analyzed which shows the out performance of the proposed system.

scholarly journals Ultracompact and low-power-consumption silicon thermo-optic switch for high-speed data

Nanophotonics ◽  
2020 ◽  
Vol 10 (2) ◽  
pp. 937-945
Author(s):  
Ruihuan Zhang ◽  
Yu He ◽  
Yong Zhang ◽  
Shaohua An ◽  
Qingming Zhu ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Speed ◽  
High Performance ◽  
Pulse Amplitude ◽  
Telecommunication Networks ◽  
Low Power Consumption ◽  
Power Efficient ◽  
High Speed Data ◽  
On Chip

AbstractUltracompact and low-power-consumption optical switches are desired for high-performance telecommunication networks and data centers. Here, we demonstrate an on-chip power-efficient 2 × 2 thermo-optic switch unit by using a suspended photonic crystal nanobeam structure. A submilliwatt switching power of 0.15 mW is obtained with a tuning efficiency of 7.71 nm/mW in a compact footprint of 60 μm × 16 μm. The bandwidth of the switch is properly designed for a four-level pulse amplitude modulation signal with a 124 Gb/s raw data rate. To the best of our knowledge, the proposed switch is the most power-efficient resonator-based thermo-optic switch unit with the highest tuning efficiency and data ever reported.

scholarly journals Design of Completion Detectors in Asynchronous Communication System

2020 ◽  
Vol 9 (3) ◽  
pp. 3329-3334
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Communication System ◽  
Implementation Process ◽  
Asynchronous Communication ◽  
Digital Design ◽  
Low Power Consumption ◽  
Asynchronous Design ◽  
Global Clock ◽  
On Chip

In digital design, there are two types of design, synchronous design and asynchronous design. In synchronous design, global clock is one of the main system that consume a lot of power. The power in synchronous design is consumed by clock even if there is no data processing take place. The asynchronous design that depends on data is clockless and as far as the power is concerned, asynchronous design does not consume much power compared with synchronous design and this really make asynchronus design the preffered choice for low power consumption. Besides having low power consumption, there are many advantages of aynchronous design compared with synchronous design. This paper proposed new dual rail completion detector (CD), 3-6 CD, 2-7 CD and 1-4 CD for on-chip communication that are used widely in an asynchronous communication system. The design of CD is based on the principle of sum adder. The circuit is designed by using Altera Quartus II CAD tools, synthesis and implementation process is executed to check the syntax error of the design. The design proved to be successful by using asynchronous on-chip communication in the simulation.

scholarly journals Temporal Encoding to Reject Background Signals in a Low Complexity, Photon Counting Communication Link

Materials ◽  
2018 ◽  
Vol 11 (9) ◽  
pp. 1671 ◽  
Author(s):  
Alexander Griffiths ◽  
Johannes Herrnsdorf ◽  
Christopher Lowe ◽  
Malcolm Macdonald ◽  
Robert Henderson ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Single Photon ◽  
Photon Counting ◽  
Low Complexity ◽  
Low Power Consumption ◽  
Communication Link ◽  
Free Space Optical ◽  
Received Power ◽  
Temporal Encoding

Communicating information at the few photon level typically requires some complexity in the transmitter or receiver in order to operate in the presence of noise. This in turn incurs expense in the necessary spatial volume and power consumption of the system. In this work, we present a self-synchronised free-space optical communications system based on simple, compact and low power consumption semiconductor devices. A temporal encoding method, implemented using a gallium nitride micro-LED source and a silicon single photon avalanche photo-detector (SPAD), demonstrates data transmission at rates up to 100 kb/s for 8.25 pW received power, corresponding to 27 photons per bit. Furthermore, the signals can be decoded in the presence of both constant and modulated background noise at levels significantly exceeding the signal power. The system’s low power consumption and modest electronics requirements are demonstrated by employing it as a communications channel between two nano-satellite simulator systems.

scholarly journals On-chip passive optical diode with low-power consumption

2018 ◽  
Vol 26 (25) ◽  
pp. 33463 ◽  
Author(s):  
Li Liu ◽  
Jin Yue ◽  
Xiaokang Fan ◽  
Wei Xue
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Low Power Consumption ◽  
On Chip ◽  
Optical Diode

scholarly journals A Self-Adaptive Mapping Approach for Network on Chip With Low Power Consumption

IEEE Access ◽  
2019 ◽  
Vol 7 ◽  
pp. 84066-84081 ◽  
Author(s):  
Aravindhan Alagarsamy ◽  
Lakshminarayanan Gopalakrishnan ◽  
Sundarakannan Mahilmaran ◽  
Seok-Bum Ko
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Network On Chip ◽  
Low Power Consumption ◽  
Mapping Approach ◽  
On Chip ◽  
Self Adaptive

Evaluation of low power consumption network on chip routing architecture

2021 ◽  
Vol 82 ◽  
pp. 103809
Author(s):  
Arulananth T S ◽  
Baskar M ◽  
Udhaya Sankar S M ◽  
R. Thiagarajan ◽  
Arul Dalton G ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Network On Chip ◽  
Low Power Consumption ◽  
On Chip

scholarly journals Energy Efficiency Analysis of MIMO Wideband RF Front-End Receivers

Sensors ◽  
2020 ◽  
Vol 20 (24) ◽  
pp. 7070
Author(s):  
Eduil Nascimento Junior ◽  
Guilherme Theis ◽  
Edson Leonardo dos Santos ◽  
André Augusto Mariano ◽  
Glauber Brante ◽  
...  
Keyword(s):  
Energy Efficiency ◽  
Power Consumption ◽  
Low Power ◽  
Noise Figure ◽  
Low Noise ◽  
Low Power Consumption ◽  
Communication Link ◽  
Active Antennas ◽  
Front End ◽  
Rf Front End

Energy-efficiency is crucial for modern radio-frequency (RF) receivers dedicated to Internet of Things applications. Energy-efficiency enhancements could be achieved by lowering the power consumption of integrated circuits, using antenna diversity or even with an association of both strategies. This paper compares two wideband RF front-end architectures, based on conventional low-noise amplifiers (LNA) and low-noise transconductance amplifiers (LNTA) with N-path filters, operating with three transmission schemes: single antenna, antenna selection and singular value decomposition beamforming. Our results show that the energy-efficiency behavior varies depending on the required communication link conditions, distance between nodes and metrics from the front-end receivers. For short-range scenarios, LNA presents the best performance in terms of energy-efficiency mainly due to its very low power consumption. With the increasing of the communication distance, the very low noise figure provided by N-path LNTA-based architectures outperforms the power consumption issue, yielding higher energy-efficiency for all transmission schemes. In addition, the selected front-end architecture depends on the number of active antennas at the receiver. Hence, we can observe that low noise figure is more important with a few active antennas at the receiver, while low power consumption becomes more important when the number of active RF chains at the receiver increases.

Sign in / Sign up

Export Citation Format

Share Document