Reduced Switch Technique for Solar PV System Based Multilevel Inverter for PQ Improvement

Author(s):  
V. Rajagopal ◽  
V. Nagamalleswari ◽  
Papia Ray ◽  
Sabha Raj Arya ◽  
J. Bangarraju

Abstract This paper describes reduced number of switches technique for Solar Photo Voltaic (SPV) voltage source based 31-level Multi Level Inverter (MLI) for Power Quality (PQ) improvement. The proposed topology reduces number of IGBT switches to ten, which is very less compared to diode clamped, capacitor and cascaded multilevel inverter. The desired multistep AC output voltage with minimum number of switches is obtained using this topology which reduces cost of system. The proposed MLI reduces number of harmonics at the AC output voltage which improves the PQ. The square wave switching used in this topology reduces the switching losses compared to pulse width modulation technique. The performance of four solar PV voltage sources with Buck/Boost converter has been discussed in this paper. The proposed MLI is mainly used in this paper for off grid system. The results of the Solar PV System based 31-level MLI have been simulated in MATLAB R2013a environment and hardware results have been validated using Opal-RT real time simulator OP-5142.

2022 ◽  
Vol 4 (1) ◽  
pp. 1-13
Author(s):  
Madhu Andela ◽  
Ahmmadhussain Shaik ◽  
Saicharan Beemagoni ◽  
Vishal Kurimilla ◽  
Rajagopal Veramalla ◽  
...  

This paper deals with a reduced switch multi-level inverter for the solar photovoltaic system-based 127-level multi-level inverter. The proposed technique uses the minimum number of switches to achieve the maximum steps in staircase AC output voltage when compared to the flying capacitor multi-level inverter, cascaded type multilevel inverter and diode clamped multi-level inverter. The use of a minimum number of switches decreases the cost of the system. To eliminate the switching losses, in this topology a square wave switch is used instead of pulse width modulation. Thereby the total harmonic distortion (THD) and harmonics have been reduced in the pulsating AC output voltage waveform. The performance of 127-level MLI is compared with 15 level, 31-level and 63-level multilevel inverters. The outcomes of the solar photovoltaic system-based 127-level multi-level inverter have been simulated in a MATLAB R2009b environment.


Author(s):  
Sreenivasappa Bhupasandra Veeranna ◽  
Udaykumar R Yaragatti ◽  
Abdul R Beig

The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter.


Author(s):  
Saminathan S & Dr. Ranjithkumar K

In this work, a new modular multilevel inverter topology is introduced for a single phase grid connected Photovoltaic system. This multilevel inverter use less number of switches to generate seven levels compared to other conventional multilevel inverters. This requires only one isolated dc source to operate. So it is suitable for renewable energy application. This inverter is designed by submodule configuration; each sub module contains two switches and one DC link capacitor. The sub modules will be added to the inverter depending on number of levels. The voltage balancing of DC link capacitor is carried out by Y matrix PWM technique. Because of Y matrix PWM technique, the inverter gets a self capacitor voltage balancing ability. So there is no need of external devices required for balancing the voltage of capacitor. A PLL for grid integration and LCL filter are designed and integrated with this inverter. The simulation of proposed system is carried out by MATLAB/SIMULINK and performance of THD is monitored as per standards


Author(s):  
M.Taw hidha ◽  
◽  
A. Rijuvana Begum ◽  
S. Bala krishnan ◽  
Smitha Elsa Peter ◽  
...  

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