Structure and Strength of Rapidly Quenched Cu-Al2O3 Composites

1998 ◽  
Vol 555 ◽  
Author(s):  
A. I. Il'Insky ◽  
A. S. Terletsky ◽  
E. W. Zozulya

AbstractMicrostructure of dispersion hardened composites (DC) Cu-Al2O3 prepared by simultaneous vacuum vapor condensation of Cu and A12O3 was studied by X-ray diffractometry and transmission electron microscopy methods. After high temperature annealing at 900°C for 2 hours the composites retain the submicrocrystalline structure and high level of strength -0.9 GPa. It has been found that strain hardening of vacuum deposited Cu-A12O3 composites takes place in three stages that is not typical for well-known composites of metallurgical origin.

1990 ◽  
Vol 183 ◽  
Author(s):  
J. L. Batstone

AbstractMotion of ordered twin/matrix interfaces in films of silicon on sapphire occurs during high temperature annealing. This process is shown to be thermally activated and is analogous to grain boundary motion. Motion of amorphous/crystalline interfaces occurs during recrystallization of CoSi2 and NiSi2 from the amorphous phase. In-situ transmission electron microscopy has revealed details of the growth kinetics and interfacial roughness.


2013 ◽  
Vol 740-742 ◽  
pp. 485-489 ◽  
Author(s):  
Wei Huang ◽  
Shao Hui Chang ◽  
Xue Chao Liu ◽  
Zheng Zheng Li ◽  
Tian Yu Zhou ◽  
...  

The near-SiC-interfaces of annealed Ni/SiC contacts were observed directly by high-resolution transmission electron microscopy (HRTEM). 1 nm native oxide layer was observed in the as-deposited contact interface. The native oxide layer cannot be removed at 650°C through rapid thermal annealing (RTA) and it was completely removed at 1000°C RTA. The residue of native oxide layer resulted in the Schottky characters. High temperature annealing (>950°C) not only removes the oxide layer in the near-SiC-interface, but also forms a well arranged flat Ni2Si/SiC interface, which contribute to the formation of ohmic behavior.


1982 ◽  
Vol 18 ◽  
Author(s):  
L. J. Chen ◽  
T. T. Chang

The formation of epitaxial CoSi2 on silicon by both conventional and two-step annealing of cobalt thin films on silicon was studied by transmission electron microscopy.For two-step annealing, samples were first annealed at 350°C for 1 h, followed by high temperature annealing at 650–950°C for 1 h. The scheme was found to bevery effective in promoting the epitaxial growth of CoSi2 on silicon as well aseliminating faceted structures on Si(111). The results are discussed in terms of the driving away of impurities from the interfaces.


2009 ◽  
Vol 92 (8) ◽  
pp. 1806-1812 ◽  
Author(s):  
Jana Bezjak ◽  
Aleksander Rečnik ◽  
Boštjan Jančar ◽  
Philippe Boullay ◽  
Ivana Radosavljević Evans ◽  
...  

CrystEngComm ◽  
2015 ◽  
Vol 17 (36) ◽  
pp. 6985-6998 ◽  
Author(s):  
Suman Pokhrel ◽  
Johannes Birkenstock ◽  
Arezoo Dianat ◽  
Janina Zimmermann ◽  
Marco Schowalter ◽  
...  

The structural transformation of WO3 at high temperatures.


2004 ◽  
Vol 817 ◽  
Author(s):  
Simona Boninelli ◽  
Fabio Iacona ◽  
Corrado Bongiorno ◽  
Corrado Spinella ◽  
Francesco Priolo

AbstractThe structural properties of Si nanoclusters embedded in SiO2, produced by high temperature annealing of SiOx films, have been investigated by energy filtered transmission electron microscopy. The presence of amorphous nanostructures, not detectable by using dark field transmission electron microscopy, has been demonstrated. By taking into account also this contribution, a quantitative description of the evolution of the samples upon thermal annealing has been accomplished. In particular, the nanocluster mean radius and the density of amorphous and crystalline clusters have been determined as a function of the annealing temperature.


2006 ◽  
Vol 911 ◽  
Author(s):  
Robert S Okojie ◽  
Xianrong Huang ◽  
Michael Dudley ◽  
Ming Zhang ◽  
Pirouz Pirouz

AbstractWe used Film Stress Measurement (FSM), Transmission Electron Microscopy (TEM), and High-Resolution X-ray Diffraction (HRXRD) techniques to obtain further knowledge with respect to the deformation, warpage, and stacking faults (SF's) that are induced in n-type 4H-SiC wafers and epilayers when subjected to mechanical polishing and high temperature (1150 oC) processing.


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