Stereo Vision VLSI Processor Based on Pixel-Serial and Window-Parallel Architecture

2000 ◽  
Vol 12 (5) ◽  
pp. 521-526
Author(s):  
Masanori Hariyama ◽  
◽  
Michitaka Kameyama
Keyword(s):  
Stereo Vision ◽  
Stereo Matching ◽  
Parallel Architecture ◽  
Window Size ◽  
Input Image ◽  
General Purpose ◽  
Image Size ◽  
Matching Algorithm ◽  
Processing Elements ◽  
General Purpose Processor

This article presents a stereo-matching algorithm to establish reliable correspondence between images by selecting a desirable window size for SAD (Sum of Absolute Differences) computation. In SAD computation, parallelism between pixels in a window changes depending on its window size, while parallelism between windows is predetermined by the input-image size. Based on this consideration, a window-parallel and pixel-serial architecture is proposed to achieve 100% utilization of processing elements. Performance of the VLSI processor is evaluated to be more than 10,000 times higher than that of a general-purpose processor.

scholarly journals Benchmarking a Many-Core Neuromorphic Platform With an MPI-Based DNA Sequence Matching Algorithm

Electronics ◽  
2019 ◽  
Vol 8 (11) ◽  
pp. 1342
Author(s):  
Gianvito Urgese ◽  
Francesco Barchi ◽  
Emanuele Parisi ◽  
Evelina Forno ◽  
Andrea Acquaviva ◽  
...  
Keyword(s):  
Dna Sequence ◽  
Parallel Architecture ◽  
General Purpose ◽  
Sequence Matching ◽  
Matching Algorithm ◽  
Computing Platform ◽  
Globally Asynchronous Locally Synchronous ◽  
Efficient Communication ◽  
The Many ◽  
Many Core

SpiNNaker is a neuromorphic globally asynchronous locally synchronous (GALS) multi-core architecture designed for simulating a spiking neural network (SNN) in real-time. Several studies have shown that neuromorphic platforms allow flexible and efficient simulations of SNN by exploiting the efficient communication infrastructure optimised for transmitting small packets across the many cores of the platform. However, the effectiveness of neuromorphic platforms in executing massively parallel general-purpose algorithms, while promising, is still to be explored. In this paper, we present an implementation of a parallel DNA sequence matching algorithm implemented by using the MPI programming paradigm ported to the SpiNNaker platform. In our implementation, all cores available in the board are configured for executing in parallel an optimised version of the Boyer-Moore (BM) algorithm. Exploiting this application, we benchmarked the SpiNNaker platform in terms of scalability and synchronisation latency. Experimental results indicate that the SpiNNaker parallel architecture allows a linear performance increase with the number of used cores and shows better scalability compared to a general-purpose multi-core computing platform.

scholarly journals A Real-Time Range Finding System with Binocular Stereo Vision

10.5772/50921 ◽  
2012 ◽  
Vol 9 (1) ◽  
pp. 26 ◽  
Author(s):  
Xiao-Bo Lai ◽  
Hai-Shun Wang ◽  
Yue-Hong Xu
Keyword(s):  
Real Time ◽  
Stereo Vision ◽  
Stereo Matching ◽  
Single Point ◽  
Time Range ◽  
Real Time Control ◽  
Matching Algorithm ◽  
Range Finding ◽  
Binocular Stereo Vision ◽  
Binocular Stereo

To acquire range information for mobile robots, a TMS320DM642 DSP-based range finding system with binocular stereo vision is proposed. Firstly, paired images of the target are captured and a Gaussian filter, as well as improved Sobel kernels, are achieved. Secondly, a feature-based local stereo matching algorithm is performed so that the space location of the target can be determined. Finally, in order to improve the reliability and robustness of the stereo matching algorithm under complex conditions, the confidence filter and the left-right consistency filter are investigated to eliminate the mismatching points. In addition, the range finding algorithm is implemented in the DSP/BIOS operating system to gain real-time control. Experimental results show that the average accuracy of range finding is more than 99% for measuring single-point distances equal to 120cm in the simple scenario and the algorithm takes about 39ms for ranging a time in a complex scenario. The effectivity, as well as the feasibility, of the proposed range finding system are verified.

A New Method on Super Pixel Reducing Stereo Matching Time of Integrated Imaging

2020 ◽  
pp. 2154014
Author(s):  
Xue-Guang Wang ◽  
Ming Li ◽  
Lei Zhang ◽  
Hui Zhao ◽  
Thelma D. Palaoag
Keyword(s):  
3D Reconstruction ◽  
Conventional Method ◽  
Stereo Vision ◽  
Stereo Matching ◽  
Technical Difficulty ◽  
New Method ◽  
Matching Algorithm ◽  
The Core ◽  
Pixel Matching ◽  
Novel Method

Stereo vision and 3D reconstruction technologies are increasingly concerned in many fields. Stereo matching algorithm is the core of stereo vision and also a technical difficulty. A novel method based on super pixels is mentioned in this paper to reduce the calculating amount and the time. Stereo images from University of Tsukuba are used to test our method. The proposed method spends only 1% of the time spent by the conventional method. Through a two-step super-pixel matching optimization, it takes 6.72 s to match a picture, which is 12.96% of the pre-optimization.

Research on Stereo Matching Algorithm in Intelligent Vehicle Application

2014 ◽  
Vol 678 ◽  
pp. 35-38 ◽  
Author(s):  
Peng He ◽  
Feng Gao
Keyword(s):  
Stereo Vision ◽  
Stereo Matching ◽  
Driver Assistance System ◽  
Experimental Results ◽  
Assistance System ◽  
Intelligent Vehicle ◽  
Driver Assistance ◽  
Matching Algorithm ◽  
Environment Perception ◽  
Vehicle Technologies

Perception of environment in front of driving vehicle is a core investigation theme of intelligent vehicle technologies aiming to increase safety, convenience and efficiency of driving. Using stereo vision for environment perception is a hot technology. This paper developed an algorithm for stereo matching in intelligent vehicle application. The experimental results indicate that this algorithm is effective. Furthermore, this algorithm paves the way for the implementation of automotive driver assistance system.

scholarly journals Deep Learning Stereo Matching Algorithm using Siamese Network

2019 ◽  
Vol 18 (3) ◽  
pp. 63-67
Author(s):  
Masoud Samadi ◽  
Mohd Fauzi Othman ◽  
Akira Taguchi
Keyword(s):  
Deep Learning ◽  
Stereo Matching ◽  
Autonomous Vehicle ◽  
Input Image ◽  
Image Resolution ◽  
Neural Net ◽  
Learning Networks ◽  
Matching Algorithm ◽  
Stereo Cameras ◽  
Speed Up

Autonomous vehicle has become a very hot topic for researchers in recent years. One of the important sensors used in these vehicles is Stereo Cameras/Vision. Stereo vision systems are used to estimate the depth from the two cameras installed on robots or vehicles. This method can deliver the 3D position of all objects captured in the scene at a lower cost and higher density compared to LIDAR. Recently, neural net-works are vastly investigated and used in image processing problems and deep learning networks which has surpassed traditional computer vision methods specially in object recognition. In this paper, we propose to use a GPU with a new Siamese deep learning method to speed up the stereo matching algorithm. In this work, we use a high end Nvidia DGX workstation to train and test our algorithm and compare the results with normal GPUs and CPUs. Based on numerical evaluation, the Nvidia DGX can train a neural network with higher input image resolution approximately 8 times faster than a normal GPU and 40 times faster than a Core i7 8 Cores CPU. Since it has the ability to train on a higher resolution the network can be trained in more iteration and results in higher accuracy.

scholarly journals A Manycore Vision Processor for Real-Time Smart Cameras

Sensors ◽  
2021 ◽  
Vol 21 (21) ◽  
pp. 7137
Author(s):  
Bruno A. da Silva ◽  
Arthur M. Lima ◽  
Janier Arias-Garcia ◽  
Michael Huebner ◽  
Jones Yudi
Keyword(s):  
Real Time ◽  
Distributed Processing ◽  
General Purpose ◽  
Frame Rate ◽  
Suitable Alternative ◽  
Smart Cameras ◽  
Real Time Processing ◽  
Processing Elements ◽  
General Purpose Processor ◽  
On Chip

Real-time image processing and computer vision systems are now in the mainstream of technologies enabling applications for cyber-physical systems, Internet of Things, augmented reality, and Industry 4.0. These applications bring the need for Smart Cameras for local real-time processing of images and videos. However, the massive amount of data to be processed within short deadlines cannot be handled by most commercial cameras. In this work, we show the design and implementation of a manycore vision processor architecture to be used in Smart Cameras. With massive parallelism exploration and application-specific characteristics, our architecture is composed of distributed processing elements and memories connected through a Network-on-Chip. The architecture was implemented as an FPGA overlay, focusing on optimized hardware utilization. The parameterized architecture was characterized by its hardware occupation, maximum operating frequency, and processing frame rate. Different configurations ranging from one to eighty-one processing elements were implemented and compared to several works from the literature. Using a System-on-Chip composed of an FPGA integrated into a general-purpose processor, we showcase the flexibility and efficiency of the hardware/software architecture. The results show that the proposed architecture successfully allies programmability and performance, being a suitable alternative for future Smart Cameras.

scholarly journals STEREO MATCHING ALGORITHM BASED ON ILLUMINATION CONTROL TO IMPROVE THE ACCURACY

2016 ◽  
Vol 35 (1) ◽  
pp. 39 ◽  
Author(s):  
Rostam Affendi Hamzah ◽  
Haidi Ibrahim ◽  
Anwar Hasni Abu Hassan
Keyword(s):  
Image Quality ◽  
Stereo Vision ◽  
Stereo Matching ◽  
State Of The Art ◽  
Experimental Results ◽  
New Method ◽  
Absolute Difference ◽  
Matching Algorithm ◽  
Disparity Maps

This paper presents a new method of pixel based stereo matching algorithm using illumination control. The state of the art algorithm for absolute difference (AD) works fast, but only precise at low texture areas. Besides, it is sensitive to radiometric distortions (i.e., contrast or brightness) and discontinuity areas. To overcome the problem, this paper proposes an algorithm that utilizes an illumination control to enhance the image quality of absolute difference (AD) matching. Thus, pixel intensities at this step are more consistent, especially at the object boundaries. Then, the gradient difference value is added to empower the reduction of the radiometric errors. The gradient characteristics are known for its robustness with regard to the radiometric errors. The experimental results demonstrate that the proposed algorithm performs much better when using a standard benchmarking dataset from the Middlebury Stereo Vision dataset. The main contribution of this work is a reduction of discontinuity errors that leads to a significant enhancement on matching quality and accuracy of disparity maps.

Design and Implementation of Low Energy Wireless Network Nodes based on Hardware Compression Acceleration

2019 ◽  
Vol 12 ◽  
Author(s):  
Hui Yang ◽  
Anand Nayyar
Keyword(s):  
Energy Consumption ◽  
Data Compression ◽  
Energy Saving ◽  
Optimization Design ◽  
Hardware Acceleration ◽  
Transmission Efficiency ◽  
General Purpose ◽  
Storage Space ◽  
General Purpose Processor ◽  
Compression Time

: In the fast development of information, the information data is increasing in geometric multiples, and the speed of information transmission and storage space are required to be higher. In order to reduce the use of storage space and further improve the transmission efficiency of data, data need to be compressed. processing. In the process of data compression, it is very important to ensure the lossless nature of data, and lossless data compression algorithms appear. The gradual optimization design of the algorithm can often achieve the energy-saving optimization of data compression. Similarly, The effect of energy saving can also be obtained by improving the hardware structure of node. In this paper, a new structure is designed for sensor node, which adopts hardware acceleration, and the data compression module is separated from the node microprocessor.On the basis of the ASIC design of the algorithm, by introducing hardware acceleration, the energy consumption of the compressed data was successfully reduced, and the proportion of energy consumption and compression time saved by the general-purpose processor was as high as 98.4 % and 95.8 %, respectively. It greatly reduces the compression time and energy consumption.

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