scholarly journals COMPARISON AND ANALYSIS OF PERFORMANCE PARAMETERS OF BASIC ADDERS WITH SPARSE ADDER

Author(s):  
K Srivalli ◽  
Medha G H ◽  
Meghna K P ◽  
Mohan Kumar A ◽  
Darshan Halliyavar

Adders play a vital role in the design of a digital system using VLSI (Very Large Scale Integration) technique. Adders are the basic building block of ALU (Arithmetic Logic Unit) which is an important component of a processor. In this paper we are comparing and analyzing the performance parameters of basic adders like Ripple Carry Adder, Carry Select Adder, Carry Look Ahead Adder, Parallel Prefix Adder along with sparse adder. The above mentioned adders are implemented using 90nm technology in Xilinx ISE 14.7 Suite.

Author(s):  
Vardhana M. ◽  
Anil Kumar Bhat

Background: Security is one of the fundamental and essential factors, which has to be addressed in the field of communication. Communication refers to the exchange of useful information between two or more nodes. Sometimes it is required to exchange some of the confidential information such as a company’s logo, which needs to be hidden from the third person. The data that is being exchanged between these nodes has to be kept confidential and secured from unintended users. The three fundamental components of security are confidentiality, integrity and authentication. The data that is being exchanged has to be confidential, and only the authorized party should have access to the information that is being exchanged. One of the key methods for securing the data is encryption. Objective: The main objective of this paper was to address the problem of data hiding and security in communication systems. There is a need for having hardware resources for having high speed data security and protection. Methods: In this paper, we implemented image watermarking using LSB technique to hide a secret image, and employed encryption using Advanced Encryption Standard, to enhance the security of the image. An image is a two dimensional signal, with each pixel value representing the intensity level. The secure transmission of the image along the channel is a challenging task, because of the reason that, any individual can access it, if no security measures are taken. Conclusion: An efficient method of digital watermarking has been implemented with increased security and performance parameters are presented. Results: In this paper, hardware realization of image watermarking/encryption and dewatermarking/ decryption is implemented using Very Large Scale Integration. The design is verified by means of co-simulation using MATLAB and Xilinx. The paper also presents the performance parameters of the design, with respect to speed, area and power.


2018 ◽  
Vol 7 (2.7) ◽  
pp. 834
Author(s):  
B V. Pavan Kumar ◽  
P Sri Ashish ◽  
K Sai Harshitha ◽  
G Sai Krishna ◽  
T Anil chowdary

Very Large-Scale Integration has a greater impact on the developing circuit technology. The Cost and Size has been gradually reducing since years but increased the circuit complexity, there are problems which may affect the growth of VLSI technology. Among them one of major problem is circuit testing. To resolve this issue, we implement Built in Self-Test (BIST). BIST architecture is used to test the circuit itself. Engineers Design BIST to achieve high reliability and low repair cycle times. We implement Linear Feedback Shift Registers (LFSR) to generate the pseudo random test pattern and implement a ripple carry adder as circuit under test and Multiple Input Signature Register(MISR) as output response analyzer and test patterns are given to circuit under test and outputs are obtained these are compared with the actual outputs to test whether the circuit is faulty or not. To check whether the circuit is faulty or fault free we check the obtained outputs with actual outputs using Signature Analysis. 


2021 ◽  
Author(s):  
Jani Babu Shaik ◽  
Siona Menezes Picardo ◽  
Sonal Singhal ◽  
Nilesh Goel

Very Large Scale Integration (VLSI) based neuromorphic circuits also known as Silicon Neurons (SiNs) emulate the electrophysiological behavior of biological neurons. With the advancement in technology, neuromorphic systems also lead to various reliability issues and hence making their study important. Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) are the two major reliability issues present in VLSI circuits. In this work, we have investigated the combined effect of BTI and HCI on the two types of integrate-and-fire based SiNs namely (a) Axon-Hillock and (b) Simplified Leaky integrate-and-fire circuits using their key performance parameters. Novel reliability-aware AH and SLIF circuits are proposed to mitigate the reliability issues. Proposed reliability-aware designs show negligible deviation in performance parameters after aging. The time-zero process variability analysis is also carried out for proposed reliability-aware SiNs. The power consumption of existing and proposed reliability-aware neuron circuits is analyzed and compared.<br>


This paper proposed, a 2X2 FIR filter which is based on the Brent-Kung adder and Vedic multiplier. A 2X2 FIR filter has been designed using Brent-Kung-Adder (BKA) and filter coefficient. Verilog platform and Xilinx 14.5 software. The BrentKung adder is much faster than the look ahead carry adder (LACD), carry select adder and ripple carry adder (RCA) and it is a parallel prefix adder. Lowarea and the power consumption in Brent-kung adder is also less as compared to various adders. Multiplication of a number using the Vedic multiplier is arithmetic key operation to be performed with low power consumption of and increase the speed in the consequence applications. Proposed design utilize the common multiplication in cross multiply to compensate the problem of delay which is occurring in the Booth Multiplier and Array Multiplier and etc. Brent-kung adder used to decrease the delay which was occur in the multiplier and significantly reduce the quantity of logic elements such as gates, signals etc.


2021 ◽  
Author(s):  
Jani Babu Shaik ◽  
Siona Menezes Picardo ◽  
Sonal Singhal ◽  
Nilesh Goel

Very Large Scale Integration (VLSI) based neuromorphic circuits also known as Silicon Neurons (SiNs) emulate the electrophysiological behavior of biological neurons. With the advancement in technology, neuromorphic systems also lead to various reliability issues and hence making their study important. Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI) are the two major reliability issues present in VLSI circuits. In this work, we have investigated the combined effect of BTI and HCI on the two types of integrate-and-fire based SiNs namely (a) Axon-Hillock and (b) Simplified Leaky integrate-and-fire circuits using their key performance parameters. Novel reliability-aware AH and SLIF circuits are proposed to mitigate the reliability issues. Proposed reliability-aware designs show negligible deviation in performance parameters after aging. The time-zero process variability analysis is also carried out for proposed reliability-aware SiNs. The power consumption of existing and proposed reliability-aware neuron circuits is analyzed and compared.<br>


2014 ◽  
Vol 155 (26) ◽  
pp. 1011-1018 ◽  
Author(s):  
György Végvári ◽  
Edina Vidéki

Plants seem to be rather defenceless, they are unable to do motion, have no nervous system or immune system unlike animals. Besides this, plants do have hormones, though these substances are produced not in glands. In view of their complexity they lagged behind animals, however, plant organisms show large scale integration in their structure and function. In higher plants, such as in animals, the intercellular communication is fulfilled through chemical messengers. These specific compounds in plants are called phytohormones, or in a wide sense, bioregulators. Even a small quantity of these endogenous organic compounds are able to regulate the operation, growth and development of higher plants, and keep the connection between cells, tissues and synergy beween organs. Since they do not have nervous and immume systems, phytohormones play essential role in plants’ life. Orv. Hetil., 2014, 155(26), 1011–1018.


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