A Novel Framework for Testing High-Speed Serial Interfaces in Multiprocessor Based Real-Time Embedded System

Recent years has seen a tremendous increase in processing requirements of present-day embedded system applications. Embedded systems consist of multiple processing elements (PEs) connected to each other using different types of interfaces. Many complicated tasks are accomplished by embedded systems in varied settings, which may introduce errors during inter-processor communication. Testing such systems is tremendously difficult and challenging from testing non-real time systems. A major part of testing real time embedded systems involves ensuring accuracy and timing in synchronous inter-process communication More specifically, the synchronization and inter-processor communication of real-time applications makes testing a challenging task and due to the demand for higher data rate increases, day-by-day, making testing of such systems even more complex. This paper presents a novel frame work that uses multiple instances of simulators with physical high-speed serial interfaces to emulate any real time embedded system communication. The framework presents a testing technique that detects all faults related to synchronization of high-speed synchronous serial interfaces in a systematic manner. The novelty of our approach is to simulate communication across multiple processors in a simulation environment for detecting and localizing bugs. We verify this framework using a case study consisting of an embedded software defined radio (SDR) system. The test results show the applicability of our approach in fixing bugs that relates to synchronization issues that otherwise are very hard to find and fix in very complicated systems, such as SDR.

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Knowledge-Based Code Clone Approach in Embedded and Real-Time Systems

Knowledge-Based Processes in Software Development - Advances in Systems Analysis, Software Engineering, and High Performance Computing ◽

10.4018/978-1-4666-4229-4.ch004 ◽

2013 ◽

pp. 49-62

Author(s):

Anupama Surendran ◽

Philip Samuel

Keyword(s):

Embedded Systems ◽

Embedded System ◽

Real Time ◽

Embedded Software ◽

Code Clones ◽

Knowledge Repository ◽

Knowledge Based ◽

Code Clone ◽

The Embedded System ◽

Time Systems

Even though human beings are using computers in their day-to-day activities, the terms embedded and real-time systems have received much attention only in the last few years, and they have become an inevitable part of our daily activities. The most evident and highlighted feature of embedded systems is the consideration of time. The significance of time constraints in designing each and every feature of embedded systems has made the software and hardware of embedded systems more complicated and entirely different from ordinary systems. Due to these reasons, several challenges exist in developing and maintaining embedded and real time software. Increase in complexity of the embedded system code increases the chance of occurrence of defects in the embedded software. Failure to deliver the software within the stipulated time, economic constraints faced during the development and the maintenance phase, inadequate testing, design of improper code and its reuse are some of the issues faced during the embedded system software development phase. In this chapter, the authors suggest a knowledge-based approach in managing the issues that arise during the coding and testing phase of embedded and real-time software. Program slicing is used to detect the code clones present in the embedded software, and a knowledge repository of code clones is created. This code clone knowledge repository is utilized during the coding and testing phase of real-time and embedded software, which in turn improves the whole software development process.

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A Novel Rail-Network Hardware Simulator for Embedded System Programming

Electronics ◽

10.3390/electronics10010013 ◽

2020 ◽

Vol 10 (1) ◽

pp. 13

Author(s):

Balaji M ◽

Chandrasekaran M ◽

Vaithiyanathan Dhandapani

Keyword(s):

Embedded Systems ◽

Embedded System ◽

Real Time ◽

Learning Outcomes ◽

Real World ◽

Time Constraints ◽

Network Simulator ◽

Practical Applications ◽

Rail Network ◽

Knowledge Enhancement

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.

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The Design of a 2D Graphics Accelerator for Embedded Systems

Electronics ◽

10.3390/electronics10040469 ◽

2021 ◽

Vol 10 (4) ◽

pp. 469

Author(s):

Hyun Woo Oh ◽

Ji Kwang Kim ◽

Gwan Beom Hwang ◽

Seung Eun Lee

Keyword(s):

Embedded Systems ◽

Embedded System ◽

Real Time ◽

Line Drawing ◽

Cmos Process ◽

Embedded Processor ◽

Processor Core ◽

Field Programmable ◽

The Embedded System ◽

Graphics Processing

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.

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Real-Time Systems in Tokamak Devices. A Case Study: The JET Tokamak

IEEE Transactions on Nuclear Science ◽

10.1109/tns.2011.2147332 ◽

2011 ◽

Vol 58 (4) ◽

pp. 1420-1426 ◽

Cited By ~ 8

Author(s):

Gianmaria De Tommasi ◽

Diogo Alves ◽

Teresa Bellizio ◽

Robert Felton ◽

André Neto ◽

...

Keyword(s):

Real Time ◽

Real Time Systems ◽

Time Systems

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Parametric analysis of distributed firm real-time systems: A case study

2010 IEEE 15th Conference on Emerging Technologies & Factory Automation (ETFA 2010) ◽

10.1109/etfa.2010.5641315 ◽

2010 ◽

Cited By ~ 2

Author(s):

Thi Thieu Hoa Le ◽

L Palopoli ◽

R Passerone ◽

Y Ramadian ◽

A Cimatti

Keyword(s):

Real Time ◽

Parametric Analysis ◽

Real Time Systems ◽

Time Systems

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Impact of Adding Security to Safety-Critical Real-Time Systems: A Case Study

2011 IEEE 35th Annual Computer Software and Applications Conference Workshops ◽

10.1109/compsacw.2011.29 ◽

2011 ◽

Cited By ~ 1

Author(s):

Andrew J. Kornecki ◽

Wendy F. Stevenson

Keyword(s):

Real Time ◽

Real Time Systems ◽

Safety Critical ◽

Time Systems

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UML as Front-End Language for Embedded Systems Design

Behavioral Modeling for Embedded Systems and Technologies ◽

10.4018/978-1-60566-750-8.ch001 ◽

2010 ◽

pp. 1-23

Author(s):

Lisane Brisolara de Brisolara ◽

Marcio Eduardo Kreutz ◽

Luigi Carro

Keyword(s):

Embedded Systems ◽

Embedded System ◽

Systems Design ◽

Design Flow ◽

Domain Specific ◽

History Of ◽

Uml Diagrams ◽

The Embedded System ◽

Definition Of

This chapter covers the use of UML as a modeling language for embedded systems design. It introduces the UML language, presenting the history of its definition, its main diagrams and characteristics. Using a case study, we show that using the standard UML with its limitations one is not able to model many important characteristics of embedded systems. For that reason, UML provides extension mechanisms that enable one to extend the language for a given domain, through the definition of profiles covering domain-specific applications. Several profiles have been proposed for the embedded systems domain, and some of those that have been standardized by OMG are presented here. A case study is also used to present MARTE, a new profile specifically proposed for the embedded system domain, enabling designers to model aspects like performance and schedulability. This chapter also presents a discussion about the effort to generate code from UML diagrams and analyses the open issues to the successful use of UML in the whole embedded system design flow.

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Implementation of FastSLAM2.0 on an Embedded System and HIL Validation using Different Sensors Data

International Journal of Adaptive Resilient and Autonomic Systems ◽

10.4018/ijaras.2015070105 ◽

2015 ◽

Vol 6 (2) ◽

pp. 88-116

Author(s):

Abouzahir Mohamed ◽

Elouardi Abdelhafid ◽

Bouaziz Samir ◽

Latif Rachid ◽

Tajer Abdelouahed

Keyword(s):

Embedded Systems ◽

Embedded System ◽

Particle Filter ◽

Real Time ◽

Autonomous Navigation ◽

Hardware In The Loop ◽

Heterogeneous Architectures ◽

Localization And Mapping ◽

Embedded Applications ◽

Robotic Applications

The improved particle filter based simultaneous localization and mapping (SLAM) has been developed for many robotic applications. The main purpose of this article is to demonstrate that recent heterogeneous architectures can be used to implement the FastSLAM2.0 and can greatly help to design embedded systems based robot applications and autonomous navigation. The algorithm is studied, optimized and evaluated with a real dataset using different sensors data and a hardware in the loop (HIL) method. Authors have implemented the algorithm on a system based embedded applications. Results demonstrate that an optimized FastSLAM2.0 algorithm provides a consistent localization according to a reference. Such systems are suitable for real time SLAM applications.

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