scholarly journals A New Cost-Efficient Design of a Reversible Gate Based on a Nano-Scale Quantum-Dot Cellular Automata Technology

Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1806
Author(s):  
Saeid Seyedi ◽  
Akira Otsuki ◽  
Nima Jafari Navimipour

Quantum-dot cellular automata (QCA) nanotechnology is a practical suggestion for replacing present silicon-based technologies. It provides many benefits, such as low power usage, high velocity, and an extreme density of logic functions on a chip. In contrast, designing circuits with no waste of information (reversible circuits) may further reduce energy losses. The Feynman gate has been recognized as one of the most famous QCA-based gates for this purpose. Since reversible gates are significant, this paper develops a new optimized reversible double Feynman gate that uses efficient arithmetic elements as its key structural blocks. Additionally, we used several modeling principles to make it consistent and more robust against noise. Moreover, we examined the suggested model and compared it to the previous models regarding the complexity, clocking, number of cells, and latency. Furthermore, we applied QCADesigner to monitor the outline and performance of the proposed gate. The results show an acceptable improvement via the designed double Feynman gate in comparison to the existing designs. Finally, the temperature and cost analysis indicated the efficiency of the proposed nan-scale gate.




2020 ◽  
Vol 10 (4) ◽  
pp. 534-547
Author(s):  
Chiradeep Mukherjee ◽  
Saradindu Panda ◽  
Asish K. Mukhopadhyay ◽  
Bansibadan Maji

Background: The advancement of VLSI in the application of emerging nanotechnology explores quantum-dot cellular automata (QCA) which has got wide acceptance owing to its ultra-high operating speed, extremely low power dissipation with a considerable reduction in feature size. The QCA architectures are emerging as a potential alternative to the conventional complementary metal oxide semiconductor (CMOS) technology. Experimental: Since the register unit has a crucial role in digital data transfer between the electronic devices, such study leading to the design of cost-efficient and highly reliable QCA register is expected to be a prudent area of research. A thorough survey on the existing literature shows that the generic models of Serial-in Serial Out (SISO), Serial-in-Parallel-Out (SIPO), Parallel-In- Serial-Out (PISO) and Parallel-in-Parallel-Out (PIPO) registers are inadequate in terms of design parameters like effective area, delay, O-Cost, Costα, etc. Results: This work introduces a layered T gate for the design of the D flip flop (LTD unit), which can be broadly used in SISO, SIPO, PISO, and PIPO register designs. For detection and reporting of high susceptible errors and defects at the nanoscale, the reliability and defect tolerant analysis of LTD unit are also carried out in this work. The QCA design metrics for the general register layouts using LTD unit is modeled. Conclusion: Moreover, the cost metrics for the proposed LTD layouts are thoroughly studied to check the functional complexity, fabrication difficulty and irreversible power dissipation of QCA register layouts.



2017 ◽  
Vol 7 ◽  
pp. 3543-3551 ◽  
Author(s):  
Milad Bagherian Khosroshahy ◽  
Mohammad Hossein Moaiyeri ◽  
Keivan Navi ◽  
Nader Bagherzadeh


Optik ◽  
2016 ◽  
Vol 127 (15) ◽  
pp. 6172-6182 ◽  
Author(s):  
Trailokya Nath Sasamal ◽  
Ashutosh Kumar Singh ◽  
Anand Mohan


2018 ◽  
Vol 57 (11) ◽  
pp. 3419-3428 ◽  
Author(s):  
Ali Newaz Bahar ◽  
Radhouane Laajimi ◽  
Md. Abdullah-Al-Shafi ◽  
Kawsar Ahmed


2019 ◽  
Vol 21 ◽  
pp. 100252 ◽  
Author(s):  
Azath Mubarakali ◽  
Jayabrabu Ramakrishnan ◽  
Dinesh Mavaluru ◽  
Amria Elsir ◽  
Omer Elsier ◽  
...  


2020 ◽  
Vol 74 (4) ◽  
pp. 487-496
Author(s):  
B. Naresh Kumar Reddy ◽  
B. Veena Vani ◽  
G. Bhavya Lahari


Sign in / Sign up

Export Citation Format

Share Document