scholarly journals Standalone Operation of Modified Seven-Level Packed U-Cell (MPUC) Single-Phase Inverter

Electronics ◽  
2019 ◽  
Vol 8 (3) ◽  
pp. 268 ◽  
Author(s):  
Ali Shojaei ◽  
Bahram Najafi ◽  
Hani Vahedi
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Voltage Waveform ◽  
Multilevel Inverters ◽  
Design Considerations ◽  
Single Phase Inverter ◽  
Load Types ◽  
Switch Voltage

In this paper the standalone operation of the modified seven-level Packed U-Cell (MPUC) inverter is presented and analyzed. The MPUC inverter has two DC sources and six switches, which generate seven voltage levels at the output. Compared to cascaded H-bridge and neutral point clamp multilevel inverters, the MPUC inverter generates a higher number of voltage levels using fewer components. The experimental results of the MPUC prototype validate the appropriate operation of the multilevel inverter dealing with various load types including motor, linear, and nonlinear ones. The design considerations, including output AC voltage RMS value, switching frequency, and switch voltage rating, as well as the harmonic analysis of the output voltage waveform, are taken into account to prove the advantages of the introduced multilevel inverter.

Comparison of Switching Angle Arrangement Techniques in Single-Phase Boost Multilevel Inverter for Low-THD Operation

2015 ◽  
Vol 793 ◽  
pp. 167-171
Author(s):  
Mohd Aizuddin Yusof ◽  
Yee Chyan Tan ◽  
M. Othman ◽  
S.S. Lee ◽  
M.A. Roslan ◽  
...  
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Solar Photovoltaic ◽  
Voltage Waveform ◽  
Voltage Level ◽  
Software Simulation ◽  
Multilevel Inverters ◽  
Simulation Results

Multilevel inverters are one of the preferred inverter choices for solar photovoltaic (PV) applications. While these inverters are capable of producing AC staircase output voltage waveform, the total harmonic distortion (THD) of the output voltage waveform can become worse if the switching angle of each voltage level is not carefully chosen. In this paper, four switching angle arrangement techniques are presented and the switching angles generated by these techniques are applied to a new single-phase boost multilevel (SPBM) inverter. The performance of 3-, 5-, 7-, 9-and 11-level SPBM inverter having four different sets of switching angles derived using the aforementioned techniques have been evaluated and compared using PSIM software. Simulation results show that one of the techniques is able to produce an output voltage waveform with the lowest THD, whilst the other generates an output voltage waveform with the highest fundamental voltage component.

scholarly journals A New Seven Level Symmetrical Inverter with Reduced Switch Count

2018 ◽  
Vol 9 (2) ◽  
pp. 921
Author(s):  
Thiyagarajan V. ◽  
Somasundaram P.
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Multilevel Inverter ◽  
Voltage Waveform ◽  
Multilevel Inverters ◽  
Minimum Number ◽  
Simulation Results ◽  
Electro Magnetic ◽  
Commercial Applications ◽  
The Cost

<span>Multilevel inverters offers less distortion and less electro-magnetic interference compared with other conventional inverters and hence, it can be used in many industrial and commercial applications.  This paper analyze the performance of the modified single phase seven level symmetrical inverter using minimum number of switches. The proposed topology consists of six switches and two dc sources, and produces seven level output voltage waveform during symmetric operation. The cost and size of the propsoed inverter minimum as it uses minimum number of components, The performance of the proposed multilevel inverter is analysed for different switching angles and the corresponding simulation results are presented. The simulation of the proposed inverter is carried out using MATLAB/Simulink software.</span>

scholarly journals Multicarrier PWM Strategies for Hybrid Symmetrical Multilevel Inverter with Reduced Switch Count

2020 ◽  
Vol 9 (5) ◽  
pp. 860-866
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Total Harmonic Distortion ◽  
Switching Frequency ◽  
Third Harmonic ◽  
Multilevel Inverters ◽  
High Switching Frequency

Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total harmonic distortion, fundamental output voltage are calculated. Simulation is carried out in MATLAB/SMULINK.

A New Structure of Quasi Z-Source-Based Cascaded Multilevel Inverter

2017 ◽  
Vol 26 (12) ◽  
pp. 1750203 ◽  
Author(s):  
Ebrahim Babaei ◽  
Mohammad Shadnam Zarbil ◽  
Mehran Sabahi
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Harmonic Distortion ◽  
Power Source ◽  
Voltage Source ◽  
Basic Unit ◽  
Dc Voltage ◽  
Multilevel Inverters ◽  
Single Phase Inverter ◽  
Cascaded Multilevel Inverter

In this paper, a new topology for cascaded multilevel inverters based on quasi Z-source converter is proposed. In the proposed topology, the magnitude of output voltage is not limited to dc voltage source, while the magnitude of output voltage of conventional cascaded multilevel inverters is limited to dc voltage source. In the proposed topology, the magnitude of output voltage can be increased by controlling the duty cycle of shoot-through (ST) state, transformer turn ratio, and the number of switched inductors in the Z-source network. As a result, there is no need for extra dc–dc converter. In the proposed topology, the total harmonic distortion (THD) is decreased in comparison with the conventional Z-source inverters. The proposed topology directly delivers power from a power source to load. In addition, in the proposed basic unit, higher voltage gain is achieved in higher modulation index which is an advantage for the proposed base unit. The performance of the proposed topology is verified by the experimental results of five-level single-phase inverter.

scholarly journals Implementation of SHE-PWM technique for single-phase inverter based on Arduino

2021 ◽  
Vol 11 (4) ◽  
pp. 2907
Author(s):  
Laith A. Mohammed ◽  
Taha A. Husain ◽  
Ahmed M. T. Ibraheem
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Practical Implementation ◽  
Half Cycle ◽  
Voltage Waveform ◽  
Pwm Inverter ◽  
Phase Inverter ◽  
Wide Range ◽  
Single Phase Inverter

This paper presents design and practical implementation of single-phase inverter based on selective harmonic elimination-pulse width modulation (SHE-PWM) technique. Microcontroller mega type Arduino used as a controller for producing the gate pulses. The optimized switching angles determination results in wide range of output voltage. Depending on number of switching angles, the lower order harmonics (LOHs) can be eliminated to improve the output voltage waveform. A comparison study using MATLAB/Simulink for sinusoidal-PWM and SHE-PWM techniques, which shows for the same LOH in the output voltage waveform, the SHE-PWM has less number of pulses per half cycle than sinusoidal-PWM strategy. The reduction in number of pulses results less switching losses. The simulation done using ten switching angles to drive R-L load. A prototype of SHE-PWM inverter with R-L load is used to validate the simulation results.

Performance Analysis of Multilevel Inverter with Reduced Number of Switches

2019 ◽  
Vol 16 (2) ◽  
pp. 422-427
Author(s):  
S. Karthikeyan ◽  
K. Lakshmi ◽  
S. Sivaranjani ◽  
J. Karthika ◽  
T. Nandhakumar
Keyword(s):  
Electromagnetic Interference ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Control Method ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Switching Frequency ◽  
Power Semiconductor ◽  
Multilevel Inverters ◽  
Modulation Control

Multilevel inverters are mainly used in high power and medium voltage applications to reduce the required voltage rating of the power semiconductor switching devices. Nowadays multilevel inverters are also preferred for various applications regardless of the power ratings because they can essentially realize lower harmonics with lower switching frequency and lower electromagnetic interference (EMI). However, it has some disadvantages such as increased number of components, complex Pulse Width Modulation control method, and voltage balancing problem. In this paper a new topology of cascaded multilevel inverter using reduced number of switches is introduced resulting in higher output voltage levels. There era five series connected H-bridges and the DC voltage is given in the ratio n0: n: n3:2n2:10n. The output voltage having 123 levels is obtained (61 positive voltage levels, 61 negative voltage levels and zero voltage levels). Reduced Total Harmonic Distortion (THD) makes them useful for electric vehicle, FACTS and has given option for various power applications. The proposed topology results in reduction of cost and has simplicity of control system. Therefore, the overall cost and complexity are greatly reduced particularly for higher output voltage levels.

Performance Analysis of a Half Bridge Cell Based Asymmetrical Multilevel Inverter Topology with Minimum Components

2020 ◽  
Vol 13 (4) ◽  
pp. 531-545
Author(s):  
Abeera D. Roy ◽  
Chandrahasan Umayal
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Multilevel Inverter ◽  
Simulation Environment ◽  
Level Control ◽  
Voltage Waveform ◽  
Multilevel Inverters ◽  
Different Types ◽  
Performance Abilities ◽  
Inverter Topology

Background: In Multilevel Inverters (MLI) as the number of level increases, there is a proportionate increase in the count of the semiconductor devices that are employed. Methods: This paper deals with an asymmetrical cascaded H-bridge inverter topology with half bridge cells to produce seven level output voltage waveform. Nearest Level Control (NLM) technique is used to produce the switching pulses. The operating principle of the proposed MLI and its performance abilities is verified through MATLAB/Simulink and a prototype is developed to provide the experimental results. Results: Total Harmonic Distortion (THD) is computed for proposed MLI for different types of loads in simulation environment as well as in the developed hardware prototype. Comparison between the proposed MLI and recent topologies demonstrates the advantageous features. Conclusion: The simulation and hardware results confirm the suitability of the proposed seven level MLI as the total component count, and the requirement of DC sources reduces considerably.

scholarly journals FPGA Implementation of a Three-Level Boost Converter-fed Seven-Level DC-Link Cascade H-Bridge inverter for Photovoltaic Applications

Electronics ◽  
2018 ◽  
Vol 7 (11) ◽  
pp. 282 ◽  
Author(s):  
Nagaraja Sulake ◽  
Ashok Devarasetty Venkata ◽  
Sai Choppavarapu
Keyword(s):  
Output Voltage ◽  
Single Phase ◽  
Boost Converter ◽  
Pulse Generation ◽  
Operating Conditions ◽  
Multilevel Inverter ◽  
Resistive Load ◽  
Voltage Waveform ◽  
Power Switches ◽  
Generation Unit

This paper presents an optimized single-phase three-level boost DC-link cascade H-bridge multilevel inverter (TLBDCLCHB MLI) system to generate a seven-level stepped output voltage waveform for photovoltaic (PV) applications. The proposed TLBDCLCHB MLI system is obtained by integrating a three-level boost converter (TLBC) with a seven-level DC-link cascade H-bridge (DCLCHB) inverter. It consists of a TLBC, level generation unit (LGU) and phase sequence generation unit (PSGU). When compared with traditional boost converter-fed multilevel inverter systems, the proposed TLBDCLCHB MLI system requires a single DC source, fewer power switches and gate drivers. Reduction in the switch count and number of DC sources makes the system cost effective and requires a smaller installation area. Pulse generation for the power switches of an LGU in a DCLCHB inverter is accomplished by providing proper conducting angles that are generated by optimized conducting angle determination (CAD) techniques. In this paper two CAD techniques i.e., equal-phase CAD (EPCAD) and step pulse wave CAD (SPWCAD) techniques are proposed to evaluate the performance of the proposed system in terms of the total harmonic distortion (THD) and the quality of the stepped output voltage waveform. The proposed system has been modeled and simulated using MATLAB/SIMULINK software. Results are presented and discussed. Also, a prototype model of a single-phase TLBDCLCHB MLI system is developed using a field-programmable gate array (FPGA)-based pulse generation with a resistive load and its performance is analyzed for various operating conditions.

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