Performance Analysis of a Half Bridge Cell Based Asymmetrical Multilevel Inverter Topology with Minimum Components

Author(s):  
Abeera D. Roy ◽  
Chandrahasan Umayal

Background: In Multilevel Inverters (MLI) as the number of level increases, there is a proportionate increase in the count of the semiconductor devices that are employed. Methods: This paper deals with an asymmetrical cascaded H-bridge inverter topology with half bridge cells to produce seven level output voltage waveform. Nearest Level Control (NLM) technique is used to produce the switching pulses. The operating principle of the proposed MLI and its performance abilities is verified through MATLAB/Simulink and a prototype is developed to provide the experimental results. Results: Total Harmonic Distortion (THD) is computed for proposed MLI for different types of loads in simulation environment as well as in the developed hardware prototype. Comparison between the proposed MLI and recent topologies demonstrates the advantageous features. Conclusion: The simulation and hardware results confirm the suitability of the proposed seven level MLI as the total component count, and the requirement of DC sources reduces considerably.

Author(s):  
Abeera Dutt Roy ◽  
Chandrahasan Umayal

Background:: In multilevel inverters (MLI) as the number of level increases, there is a proportionate increase in the count of the semiconductor devices that are employed. Methods:: An asymmetrical multilevel inverter topology using a bidirectional switch is presented which employs lesser number of power electronic devices to produce fifteen levels at the output voltage. Nearest Level modulation (NLM) technique is used to generate the switching pulses and reliability analysis is performed using Markov reliability methodology. The operating principle of the proposed MLI and its performance abilities is verified through MATLAB/Simulink and a prototype is developed to provide the experimental results. Results:: Total Harmonic Distortion (THD) is computed for proposed MLI for different types of loads in simulation environment as well as in the developed hardware prototype. The fifteen level is achieved by using only 9 switches and 3 DC sources in comparison to the 28 switches and 6 DC sources required by the traditional cascaded H-bridge inverter. Conclusion:: The simulation and hardware results confirm the suitability of the proposed fifteen level MLI as the total component count and the requirement of DC sources reduces considerably.


2015 ◽  
Vol 793 ◽  
pp. 167-171
Author(s):  
Mohd Aizuddin Yusof ◽  
Yee Chyan Tan ◽  
M. Othman ◽  
S.S. Lee ◽  
M.A. Roslan ◽  
...  

Multilevel inverters are one of the preferred inverter choices for solar photovoltaic (PV) applications. While these inverters are capable of producing AC staircase output voltage waveform, the total harmonic distortion (THD) of the output voltage waveform can become worse if the switching angle of each voltage level is not carefully chosen. In this paper, four switching angle arrangement techniques are presented and the switching angles generated by these techniques are applied to a new single-phase boost multilevel (SPBM) inverter. The performance of 3-, 5-, 7-, 9-and 11-level SPBM inverter having four different sets of switching angles derived using the aforementioned techniques have been evaluated and compared using PSIM software. Simulation results show that one of the techniques is able to produce an output voltage waveform with the lowest THD, whilst the other generates an output voltage waveform with the highest fundamental voltage component.


2019 ◽  
Vol 5 (6) ◽  
pp. 9
Author(s):  
Deepa Raghuwanshi ◽  
Santosh Kumar

Multilevel inverters with a large number of steps can generate high quality voltage waveforms, good enough to be considered as suitable voltage source generators. An advanced multilevel inverter topology is proposed to optimize number of bidirectional switches. In this work the an five-level cascade H-bridge Inverter, which uses multicarrier based control structure and two capacitor with 10 switching MOSFETs topology is being presented. Analysis is done for RL and pure resistive load. The PWM strategy reduces the THD and this strategy enhances the fundamental output voltage. The experimental and simulated results show that total harmonic distortion of output voltage and current waveform shapes are 5.16 % and 5.77% respectively for RL load which are within the acceptable limits.


Energies ◽  
2019 ◽  
Vol 12 (9) ◽  
pp. 1810 ◽  
Author(s):  
Muhyaddin Rawa ◽  
Marif Daula Siddique ◽  
Saad Mekhilef ◽  
Noraisyah Mohamed Shah ◽  
Hussain Bassi ◽  
...  

Multilevel inverters are proficient in achieving a high-quality staircase output voltage waveform with a lower amount of harmonic content. In this paper, a new hybrid multilevel inverter topology based on the T-type and H-bridge module is presented. The proposed topology aims to achieve a higher number of levels utilizing a lower number of switches, direct current (dc) voltage sources, and voltage stresses across different switches. The basic unit of the proposed single T-type and double H-bridge multilevel inverter (STDH-MLI) produces 15 levels at the output using three dc voltage sources. The proposed topology can be extended by connecting a larger number of dc voltage sources in the T-type section. The nearest level control (NLC) switching technique is used to generate gate pulses for switches to achieve a high-quality output voltage waveform. In addition, a simplified way to achieve NLC is also described in the paper. A detailed comparison with other similar topologies is provided to set the benchmark of the proposed topology. Finally, experimental work is carried out to validate the performance of the proposed topology.


2017 ◽  
Vol 7 (1.5) ◽  
pp. 209
Author(s):  
B.Vijaya Krishna ◽  
B. Venkata Prashanth ◽  
P. Sujatha

Multilevel Inverters (MLI) have very good features when compared to Inverters. But using more switches in the conventional configuration will reduce its application in a wider range. For that reason a modified 7-level MLI Topology is presented. This new topology consists of less number of switches that can be reduced to the maximum extent and a separate gate trigger circuit. This will reduce the switching losses, reduce the size of the multilevel inverter, and cost of installation. This new topology can be used in Electrical drives and renewable energy applications. Performance of the new MLI is tested via. Total harmonic distortion. This construction structure of this multilevel inverter topology can also be increased for 9-level, 11-level and so on and simulated by the use of MATLAB/SIMULINK. A separate Carrier Based PWM Technique is used for the pulse generation in this configuration.


2019 ◽  
Vol 28 (06) ◽  
pp. 1950089 ◽  
Author(s):  
V. Thiyagarajan ◽  
P. Somasundaram ◽  
K. Ramash Kumar

Multilevel inverter (MLI) has become more popular in high power, high voltage industries owing to its high quality output voltage waveform. This paper proposes a novel single phase extendable type MLI topology. The term ‘extendable’ is included since the presented topology can be extended with maximum number of dc voltage sources to synthesize larger output levels. This topology can be operated in both symmetrical and asymmetrical conditions. The major advantages of the proposed inverter topology include minimum switching components, reduced gate driver circuits, less harmonic distortion and reduced switching losses. The comparative analysis based on the number of switches, dc voltage sources and conduction switches between the proposed topology and other existing topologies is presented in this paper. The comparison results show that the proposed inverter topology requires fewer components. The performance of the proposed MLI topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter topology and also the feasibility of the presented topology during the symmetrical condition has been validated experimentally.


Electronics ◽  
2019 ◽  
Vol 8 (3) ◽  
pp. 268 ◽  
Author(s):  
Ali Shojaei ◽  
Bahram Najafi ◽  
Hani Vahedi

In this paper the standalone operation of the modified seven-level Packed U-Cell (MPUC) inverter is presented and analyzed. The MPUC inverter has two DC sources and six switches, which generate seven voltage levels at the output. Compared to cascaded H-bridge and neutral point clamp multilevel inverters, the MPUC inverter generates a higher number of voltage levels using fewer components. The experimental results of the MPUC prototype validate the appropriate operation of the multilevel inverter dealing with various load types including motor, linear, and nonlinear ones. The design considerations, including output AC voltage RMS value, switching frequency, and switch voltage rating, as well as the harmonic analysis of the output voltage waveform, are taken into account to prove the advantages of the introduced multilevel inverter.


Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2321
Author(s):  
Mohammad Tayyab ◽  
Adil Sarwar ◽  
Irfan Khan ◽  
Mohd Tariq ◽  
Md Reyaz Hussan ◽  
...  

A new triple voltage boosting switched-capacitor multilevel inverter (SCMLI) is presented in this paper. It can produce 13-level output voltage waveform by utilizing 12 switches, three diodes, three capacitors, and one DC source. The capacitor voltages are self-balanced as all the three capacitors present in the circuit are connected across the DC source to charge it to the desired voltage level for several instants in one fundamental cycle. A detailed comparative analysis is carried to show the advantages of the proposed topology in terms of the number of switches, number of capacitors, number of sources, total standing voltage (TSV), and boosting of the converter with the recently published 13-level topologies. The nearest level control (NLC)-based algorithm is used for generating switching signals for the IGBTs present in the circuit. The TSV of the proposed converter is 22. Experimental results are obtained for different loading conditions by using a laboratory hardware prototype to validate the simulation results. The efficiency of the proposed inverter is 97.2% for a 200 watt load.


Multilevel inverters are widely used for high power and high voltage applications. The performance of multilevel inverters are superior to conventional two level inverters in terms of reduced total harmonic distortion, higher dc link voltages, lower electromagnetic interference and increased quality in the output voltage waveform. This paper presents a single phase hybrid eleven level multilevel inverter topology with reduced switch count to compensate the above mentioned disadvantages. This paper also presents various high switching frequency based multi carrier pulse width modulation strategies such as Phase Disposition PWM Strategy (PDPWM), Phase Opposition and Disposition PWM Strategy (PODPWM), Alternate Phase opposition Disposition PWM (APODPWM), Carrier Overlapping PWM (COPWM), Variable frequency carrier PWM (VFPWM), Third Harmonic Injection PWM (TFIPWM) applied to the proposed eleven level multilevel inverter and is analyzed for RL load. FFT analysis is carried out and total harmonic distortion, fundamental output voltage are calculated. Simulation is carried out in MATLAB/SMULINK.


Author(s):  
Asef A. Saleh ◽  
Rakan Khalil Antar ◽  
Harith Ahmed Al-Badrani

The advantage of multilevel inverters is to produce high output voltage values with distortion as minimum as possible. To reduce total harmonic distortion (THD) and get an output voltage with different step levels using less power electronics switching devices, 15-level inverter is designed in this paper. Single-phase 11-switches with zero-level (ZL) and none-zero-level (NZL) inverter based on modified absolute sinusoidal pulse width modulation (MASPWM) technique is designed, modelled and built by MATLAB/Simulink. Simulation results explained that, multilevel inverter with NZL gives distortion percent less than that with ZL voltage. The THD of the inverter output voltage and current of ZL are 4% and 1%, while with NZL is 3.6% and 0.84%, respectively. These results explain the effectiveness of the suggested power circuit and MASPWM controller to get the required voltage with low THD.


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