scholarly journals An Image Signal Accumulation Multi-Collection-Gate Image Sensor Operating at 25 Mfps with 32 × 32 Pixels and 1220 In-Pixel Frame Memory

Sensors ◽  
2018 ◽  
Vol 18 (9) ◽  
pp. 3112 ◽  
Author(s):  
Vu Dao ◽  
Nguyen Ngo ◽  
Anh Nguyen ◽  
Kazuhiro Morimoto ◽  
Kazuhiro Shimonomura ◽  
...  

The paper presents an ultra-high-speed image sensor for motion pictures of reproducible events emitting very weak light. The sensor is backside-illuminated. Each pixel is equipped with the multiple collection gates (MCG) at the center of the front side. Each collection gate is connected to an in-pixel large memory unit, which can accumulate image signals captured by repetitive imaging. The combination of the backside illumination, image signal accumulation, and slow readout from the in-pixel signal storage after an image capturing operation offers a very high sensitivity. Pipeline signal transfer from the MCG to the in-pixel memory units enables the sensor to achieve a large frame count and a very high frame rate at the same time. A test sensor was fabricated with a pixel count of 32 × 32 pixels. Each pixel is equipped with four collection gates, each connected to a memory unit with 305 elements; thus, with a total frame count of 1220 (305 × 4) frames. The test camera achieved 25 Mfps, while the sensor was designed to operate at 50 Mfps.

Sensors ◽  
2021 ◽  
Vol 21 (7) ◽  
pp. 2506
Author(s):  
Nguyen Hoai Ngo ◽  
Kazuhiro Shimonomura ◽  
Taeko Ando ◽  
Takayoshi Shimura ◽  
Heiji Watanabe ◽  
...  

A burst image sensor named Hanabi, meaning fireworks in Japanese, includes a branching CCD and multiple CMOS readout circuits. The sensor is backside-illuminated with a light/charge guide pipe to minimize the temporal resolution by suppressing the horizontal motion of signal carriers. On the front side, the pixel has a guide gate at the center, branching to six first-branching gates, each bifurcating to second-branching gates, and finally connected to 12 (=6×2) floating diffusions. The signals are either read out after an image capture operation to replay 12 to 48 consecutive images, or continuously transferred to a memory chip stacked on the front side of the sensor chip and converted to digital signals. A CCD burst image sensor enables a noiseless signal transfer from a photodiode to the in-situ storage even at very high frame rates. However, the pixel count conflicts with the frame count due to the large pixel size for the relatively large in-pixel CCD memory elements. A CMOS burst image sensor can use small trench-type capacitors for memory elements, instead of CCD channels. However, the transfer noise from a floating diffusion to the memory element increases in proportion to the square root of the frame rate. The Hanabi chip overcomes the compromise between these pros and cons.


Sensors ◽  
2021 ◽  
Vol 21 (11) ◽  
pp. 3713
Author(s):  
Soyeon Lee ◽  
Bohyeok Jeong ◽  
Keunyeol Park ◽  
Minkyu Song ◽  
Soo Youn Kim

This paper presents a CMOS image sensor (CIS) with built-in lane detection computing circuits for automotive applications. We propose on-CIS processing with an edge detection mask used in the readout circuit of the conventional CIS structure for high-speed lane detection. Furthermore, the edge detection mask can detect the edges of slanting lanes to improve accuracy. A prototype of the proposed CIS was fabricated using a 110 nm CIS process. It has an image resolution of 160 (H) × 120 (V) and a frame rate of 113, and it occupies an area of 5900 μm × 5240 μm. A comparison of its lane detection accuracy with that of existing edge detection algorithms shows that it achieves an acceptable accuracy. Moreover, the total power consumption of the proposed CIS is 9.7 mW at pixel, analog, and digital supply voltages of 3.3, 3.3, and 1.5 V, respectively.


Sensors ◽  
2020 ◽  
Vol 20 (13) ◽  
pp. 3649
Author(s):  
Minhyun Jin ◽  
Hyeonseob Noh ◽  
Minkyu Song ◽  
Soo Youn Kim

In this paper, we propose a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) that has built-in mask circuits to selectively capture either edge-detection images or normal 8-bit images for low-power computer vision applications. To detect the edges of images in the CIS, neighboring column data are compared in in-column memories after column-parallel analog-to-digital conversion with the proposed mask. The proposed built-in mask circuits are implemented in the CIS without a complex image signal processer to obtain edge images with high speed and low power consumption. According to the measurement results, edge images were successfully obtained with a maximum frame rate of 60 fps. A prototype sensor with 1920 × 1440 resolution was fabricated with a 90-nm 1-poly 5-metal CIS process. The area of the 4-shared 4T-active pixel sensor was 1.4 × 1.4 µm2, and the chip size was 5.15 × 5.15 mm2. The total power consumption was 9.4 mW at 60 fps with supply voltages of 3.3 V (analog), 2.8 V (pixel), and 1.2 V (digital).


Sensors ◽  
2019 ◽  
Vol 19 (10) ◽  
pp. 2247 ◽  
Author(s):  
Takeharu Etoh ◽  
Tomoo Okinaka ◽  
Yasuhide Takano ◽  
Kohsei Takehara ◽  
Hitoshi Nakano ◽  
...  

Light in flight was captured by a single shot of a newly developed backside-illuminated multi-collection-gate image sensor at a frame interval of 10 ns without high-speed gating devices such as a streak camera or post data processes. This paper reports the achievement and further evolution of the image sensor toward the theoretical temporal resolution limit of 11.1 ps derived by the authors. The theoretical analysis revealed the conditions to minimize the temporal resolution. Simulations show that the image sensor designed following the specified conditions and fabricated by existing technology will achieve a frame interval of 50 ps. The sensor, 200 times faster than our latest sensor will innovate advanced analytical apparatuses using time-of-flight or lifetime measurements, such as imaging TOF-MS, FLIM, pulse neutron tomography, PET, LIDAR, and more, beyond these known applications.


2021 ◽  
Vol 30 (1) ◽  
pp. 61-65
Author(s):  
Sang-Hwan Kim ◽  
Hyeunwoo Kwen ◽  
Juneyoung Jang ◽  
Young-Mo Kim ◽  
Jang-Kyoo Shin

1997 ◽  
Vol 44 (10) ◽  
pp. 1617-1624 ◽  
Author(s):  
W.F. Kosonocky ◽  
G. Yang ◽  
R.K. Kabra ◽  
C. Ye ◽  
Z. Pektas ◽  
...  

2020 ◽  
Author(s):  
Jill Juneau ◽  
Guillaume Duret ◽  
Joshua P. Chu ◽  
Alexander V. Rodriguez ◽  
Savva Morozov ◽  
...  

AbstractObserving the activity of large populations of neurons in vivo is critical for understanding brain function and dysfunction. The use of fluorescent genetically-encoded calcium indicators (GECIs) in conjunction with miniaturized microscopes is an exciting emerging toolset for recording neural activity in unrestrained animals. Despite their potential, current miniaturized microscope designs are limited by using image sensors with low frame rates, sensitivity, and resolution. Beyond GECIs, there are many neuroscience applications which would benefit from the use of other emerging neural indicators, such as fluorescent genetically-encoded voltage indicators (GEVIs) that have faster temporal resolution to match neuron spiking, yet, require imaging at high speeds to properly sample the activity-dependent signals. We integrated an advanced CMOS image sensor into a popular open-source miniaturized microscope platform. MiniFAST is a fast and sensitive miniaturized microscope capable of 1080p video, 1.5 µm resolution, frame rates up to 500 Hz and high gain ability (up to 70 dB) to image in extremely low light conditions. We report results of high speed 500 Hz in vitro imaging of a GEVI and ∼300 Hz in vivo imaging of transgenic Thy1-GCaMP6f mice. Finally, we show the potential for a reduction in photobleaching by using high gain imaging with ultra-low excitation light power (0.05 mW) at 60 Hz frame rates while still resolving Ca2+ spiking activity. Our results extend miniaturized microscope capabilities in high-speed imaging, high sensitivity and increased resolution opening the door for the open-source community to use fast and dim neural indicators.


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