CMOS Depth Image Sensor with Offset Pixel Aperture Using a Back-Side Illumination Structure for Improving Disparity

This paper presents a CMOS depth image sensor with offset pixel aperture (OPA) using a back-side illumination structure to improve disparity. The OPA method is an efficient way to obtain depth information with a single image sensor without additional external factors. Two types of apertures (i.e., left-OPA (LOPA) and right-OPA (ROPA)) are applied to pixels. The depth information is obtained from the disparity caused by the phase difference between the LOPA and ROPA images. In a CMOS depth image sensor with OPA, disparity is important information. Improving disparity is an easy way of improving the performance of the CMOS depth image sensor with OPA. Disparity is affected by pixel height. Therefore, this paper compared two CMOS depth image sensors with OPA using front-side illumination (FSI) and back-side illumination (BSI) structures. As FSI and BSI chips are fabricated via different processes, two similar chips were used for measurement by calculating the ratio of the OPA offset to pixel size. Both chips were evaluated for chief ray angle (CRA) and disparity in the same measurement environment. Experimental results were then compared and analyzed for the two CMOS depth image sensors with OPA.

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A 4-tap global shutter pixel with enhanced IR sensitivity for VGA time-of-flight CMOS image sensors

Electronic Imaging ◽

10.2352/issn.2470-1173.2020.7.iss-103 ◽

2020 ◽

Vol 2020 (7) ◽

pp. 103-1-103-6

Author(s):

Taesub Jung ◽

Yonghun Kwon ◽

Sungyoung Seo ◽

Min-Sun Keel ◽

Changkeun Lee ◽

...

Keyword(s):

Time Of Flight ◽

Light Sensitivity ◽

Image Sensor ◽

Image Sensors ◽

Double Sampling ◽

Back Side ◽

Long Distance ◽

Correlated Double Sampling ◽

Cmos Image Sensors ◽

Side Illumination

An indirect time-of-flight (ToF) CMOS image sensor has been designed with 4-tap 7 μm global shutter pixel in back-side illumination process. 15000 e- of high full-well capacity (FWC) per a tap of 3.5 μm pitch and 3.6 e- of read-noise has been realized by employing true correlated double sampling (CDS) structure with storage gates (SGs). Noble characteristics such as 86 % of demodulation contrast (DC) at 100MHz operation, 37 % of higher quantum efficiency (QE) and lower parasitic light sensitivity (PLS) at 940 nm have been achieved. As a result, the proposed ToF sensor shows depth noise less than 0.3 % with 940 nm illuminator in even long distance.

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Super Field-of-View Lensless Camera by Coded Image Sensors

Sensors ◽

10.3390/s19061329 ◽

2019 ◽

Vol 19 (6) ◽

pp. 1329 ◽

Cited By ~ 3

Author(s):

Tomoya Nakamura ◽

Keiichiro Kagawa ◽

Shiho Torashima ◽

Masahiro Yamaguchi

Keyword(s):

Imaging System ◽

Complementary Metal Oxide Semiconductor ◽

Image Sensor ◽

Image Sensors ◽

Computational Imaging ◽

Field Of View ◽

Oxide Semiconductor ◽

Back Side ◽

Cmos Image Sensors ◽

Rich Information

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor (CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realized super-field-of-view imaging without lenses or coding masks and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.

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Back Side Illumination Image Sensor Characterization by Backside Circuit Editing

10.31399/asm.cp.istfa2021p0122 ◽

2021 ◽

Author(s):

Jian Yu ◽

Jin Xu ◽

Niel Sanico

Keyword(s):

Electron Beam ◽

Optical Imaging ◽

Ion Beam ◽

Image Sensor ◽

Back Side ◽

Novel Approach ◽

Side Illumination

Abstract The characterization of Back Side Illumination (BSI) Image Sensor is challenging because of its unique construct with silicon on top. A novel approach for the BSI Image sensor characterization will be presented in this paper. The proposed approach utilizes the circuit editing through the silicon (backside) by ion beam and optical imaging. This technique allows access to the buried conductors and creates probe points for measurements, which are typically performed by an optical prober, electron beam prober or a mechanical micro/nano prober.

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Enabling Wafer Level Processes for CIS Manufacturing

Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) ◽

10.4071/2010dpc-tha36 ◽

2010 ◽

Vol 2010 (DPC) ◽

pp. 002393-002413

Author(s):

Eric F. Pabo ◽

Garrett Oakes ◽

Ron Miller ◽

Paul Lindner ◽

Gerald Kreindl ◽

...

Keyword(s):

Image Sensor ◽

Image Sensors ◽

Oxide Semiconductor ◽

Sensor Technology ◽

Cost Ratio ◽

Cost Curve ◽

Back Side ◽

Wafer Level ◽

3D Packaging ◽

Lens Molding

CMOS (Complimentary Metal Oxide Semiconductor) Image Sensors have become ubiquitous, appearing in cars, cell phones, toys and many other devices used in every day life. The primary reason for this increasing presence of CIS (CMOS Image Sensors) is the continual improvement of the performance to cost ratio of these devices. The drivers behind this are the advancements of CMOS image sensor technology such as improved signal to noise ratio as well as advancements in wafer level processing technology related to 3D packaging. Numerous process developments related to both the electrical and optical aspects of 3D packaging of CIS that have enabled this climb up the performance vs. cost curve will be reviewed in this paper with particular attention to:(1) Lens molding – The ability to mold lenses, both spherical and aspherical at the wafer level as well as make full size master stamps from partial masters for lens molding. These lenses can be molded on both sides of a wafer and the lenses aligned to each other;(2) Aligned wafer bonding for optical interconnects consisting of lens stacks and CIS wafer, to allow the thinning of a CIS for BSI (back side illumination), and for electrical interconnects. Together these processes allow the heterogeneous integration of optical and electrical elements at the wafer level and advance the CIS up the performance vs. cost curve.

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Back Side Illumination Image Sensor Characterization by Backside Circuit Editing

ISTFA 2020: Papers Accepted for the Planned 46th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2020p0129 ◽

2020 ◽

Author(s):

Jian Yu ◽

Jin Xu ◽

Niel Sanico

Keyword(s):

Electron Beam ◽

Optical Imaging ◽

Ion Beam ◽

Image Sensor ◽

Back Side ◽

Novel Approach ◽

Side Illumination

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Triple Planar Heterojunction of SnO2/WO3/BiVO4 with Enhanced Photoelectrochemical Performance under Front Illumination

Applied Sciences ◽

10.3390/app8101765 ◽

2018 ◽

Vol 8 (10) ◽

pp. 1765 ◽

Cited By ~ 7

Author(s):

Swetha Bhat ◽

Sol Lee ◽

Jun Suh ◽

Seung-Pyo Hong ◽

Ho Jang

Keyword(s):

Charge Separation ◽

Back Side ◽

Front Side ◽

New Paradigm ◽

Photoelectrochemical Performance ◽

Hydrogen Electrode ◽

Intimate Contact ◽

Efficient Charge ◽

Planar Heterojunction ◽

Side Illumination

The performance of a BiVO4 photoanode is limited by poor charge transport, especially under front side illumination. Heterojunction of different metal oxides with staggered band configuration is a promising route, as it facilitates charge separation/transport and thereby improves photoactivity. We report a ternary planar heterojunction photoanode with enhanced photoactivity under front side illumination. SnO2/WO3/BiVO4 films were fabricated through electron beam deposition and subsequent wet chemical method. Remarkably high external quantum efficiency of ~80% during back side and ~90% upon front side illumination at a wavelength of 400 nm has been witnessed for SnO2/WO3/BiVO4 at 1.23 V vs. reversible hydrogen electrode (RHE). The intimate contact between the heterojunction films enabled efficient charge separation at the interface and promoted electron transport. This work provides a new paradigm for designing triple heterojunction to improve photoactivity, particularly under front illumination, which would be beneficial for the development of tandem devices.

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Effects of Offset Pixel Aperture Width on the Performances of Monochrome CMOS Image Sensors for Depth Extraction

Sensors ◽

10.3390/s19081823 ◽

2019 ◽

Vol 19 (8) ◽

pp. 1823 ◽

Cited By ~ 5

Author(s):

Lee ◽

Choi ◽

Kim ◽

Lee ◽

...

Keyword(s):

Three Dimensional ◽

Image Sensor ◽

Image Sensors ◽

Depth Information ◽

Cmos Image Sensors ◽

Depth Extraction ◽

Pixel Array ◽

Test Elements ◽

Aperture Width ◽

External Light Source

This paper presents the effects of offset pixel aperture width on the performance of monochrome (MONO) CMOS image sensors (CISs) for a three-dimensional image sensor. Using a technique to integrate the offset pixel aperture (OPA) inside each pixel, the depth information can be acquired using a disparity from OPA patterns. The OPA is classified into two pattern types: Left-offset pixel aperture (LOPA) and right-offset pixel aperture (ROPA). These OPAs are divided into odd and even rows and integrated in a pixel array. To analyze the correlation between the OPA width and the sensor characteristics, experiments were conducted by configuring the test elements group (TEG) regions. The OPA width of the TEG region for the measurement varied in the range of 0.3–0.5 μm. As the aperture width decreased, the disparity of the image increased, while the sensitivity decreased. It is possible to acquire depth information by the disparity obtained from the proposed MONO CIS using the OPA technique without an external light source. Therefore, the proposed MONO CIS with OPA could easily be applied to miniaturized devices. The proposed MONO CIS was designed and manufactured using the 0.11 μm CIS process.

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Super Field-of-View Lensless Camera by Coded Image Sensors

10.20944/preprints201902.0265.v1 ◽

2019 ◽

Author(s):

Tomoya Nakamura ◽

Keiichiro Kagawa ◽

Shiho Torashima ◽

Masahiro Yamaguchi

Keyword(s):

Imaging System ◽

Complementary Metal Oxide Semiconductor ◽

Image Sensor ◽

Image Sensors ◽

Computational Imaging ◽

Field Of View ◽

Oxide Semiconductor ◽

Back Side ◽

Cmos Image Sensors ◽

Rich Information

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor~(CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive-sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realizes super field-of-view imaging without lenses or coding masks, and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.

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Front-Inner Lens for High Sensitivity of CMOS Image Sensors

Sensors ◽

10.3390/s19071536 ◽

2019 ◽

Vol 19 (7) ◽

pp. 1536 ◽

Cited By ~ 2

Author(s):

Godeun Seok ◽

Yunkyung Kim

Keyword(s):

High Resolution ◽

Aspect Ratio ◽

High Sensitivity ◽

Image Sensor ◽

Image Sensors ◽

Optical Simulation ◽

Optical Performance ◽

Pixel Size ◽

Cmos Image Sensors ◽

Pixel Pitch

Due to the continuing improvements in camera technology, a high-resolution CMOS image sensor is required. However, a high-resolution camera requires that the pixel pitch is smaller than 1.0 μm in the limited sensor area. Accordingly, the optical performance of the pixel deteriorates with the aspect ratio. If the pixel depth is shallow, the aspect ratio is enhanced. Also, optical performance can improve if the sensitivity in the long wavelengths is guaranteed. In this current work, we propose a front-inner lens structure that enhances the sensitivity to the small pixel size and the shallow pixel depth. The front-inner lens was located on the front side of the backside illuminated pixel for enhancement of the absorption. The proposed structures in the 1.0 μm pixel pitch were investigated with 3D optical simulation. The pixel depths were 3.0, 2.0, and 1.0 μm. The materials of the front-inner lens were varied, including air and magnesium fluoride (MgF2). For analysis of the sensitivity enhancement, we compared the typical pixel with the suggested pixel and confirmed that the absorption rate of the suggested pixel was improved by a maximum of 7.27%, 10.47%, and 29.28% for 3.0, 2.0, and 1.0 μm pixel depths, respectively.

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1/f Noise Modelling and Characterization for CMOS Quanta Image Sensors

Sensors ◽

10.3390/s19245459 ◽

2019 ◽

Vol 19 (24) ◽

pp. 5459

Author(s):

Wei Deng ◽

Eric R. Fossum

Keyword(s):

Analog Circuits ◽

Image Sensor ◽

Image Sensors ◽

Correlated Double Sampling ◽

Cmos Image Sensors ◽

Source Follower ◽

Cmos Analog Circuits ◽

Different Origins ◽

Noise Models ◽

Fitting Model

This work fits the measured in-pixel source-follower noise in a CMOS Quanta Image Sensor (QIS) prototype chip using physics-based 1/f noise models, rather than the widely-used fitting model for analog designers. This paper discusses the different origins of 1/f noise in QIS devices and includes correlated double sampling (CDS). The modelling results based on the Hooge mobility fluctuation, which uses one adjustable parameter, match the experimental measurements, including the variation in noise from room temperature to –70 °C. This work provides useful information for the implementation of QIS in scientific applications and suggests that even lower read noise is attainable by further cooling and may be applicable to other CMOS analog circuits and CMOS image sensors.

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