Enabling Wafer Level Processes for CIS Manufacturing

2010 ◽  
Vol 2010 (DPC) ◽  
pp. 002393-002413
Author(s):  
Eric F. Pabo ◽  
Garrett Oakes ◽  
Ron Miller ◽  
Paul Lindner ◽  
Gerald Kreindl ◽  
...  
Keyword(s):  
Image Sensor ◽  
Image Sensors ◽  
Oxide Semiconductor ◽  
Sensor Technology ◽  
Cost Ratio ◽  
Cost Curve ◽  
Back Side ◽  
Wafer Level ◽  
3D Packaging ◽  
Lens Molding

CMOS (Complimentary Metal Oxide Semiconductor) Image Sensors have become ubiquitous, appearing in cars, cell phones, toys and many other devices used in every day life. The primary reason for this increasing presence of CIS (CMOS Image Sensors) is the continual improvement of the performance to cost ratio of these devices. The drivers behind this are the advancements of CMOS image sensor technology such as improved signal to noise ratio as well as advancements in wafer level processing technology related to 3D packaging. Numerous process developments related to both the electrical and optical aspects of 3D packaging of CIS that have enabled this climb up the performance vs. cost curve will be reviewed in this paper with particular attention to:(1) Lens molding – The ability to mold lenses, both spherical and aspherical at the wafer level as well as make full size master stamps from partial masters for lens molding. These lenses can be molded on both sides of a wafer and the lenses aligned to each other;(2) Aligned wafer bonding for optical interconnects consisting of lens stacks and CIS wafer, to allow the thinning of a CIS for BSI (back side illumination), and for electrical interconnects. Together these processes allow the heterogeneous integration of optical and electrical elements at the wafer level and advance the CIS up the performance vs. cost curve.

scholarly journals Super Field-of-View Lensless Camera by Coded Image Sensors

Sensors ◽  
2019 ◽  
Vol 19 (6) ◽  
pp. 1329 ◽  
Author(s):  
Tomoya Nakamura ◽  
Keiichiro Kagawa ◽  
Shiho Torashima ◽  
Masahiro Yamaguchi
Keyword(s):  
Imaging System ◽  
Complementary Metal Oxide Semiconductor ◽  
Image Sensor ◽  
Image Sensors ◽  
Computational Imaging ◽  
Field Of View ◽  
Oxide Semiconductor ◽  
Back Side ◽  
Cmos Image Sensors ◽  
Rich Information

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor (CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realized super-field-of-view imaging without lenses or coding masks and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.

scholarly journals Super Field-of-View Lensless Camera by Coded Image Sensors

2019 ◽  
Author(s):  
Tomoya Nakamura ◽  
Keiichiro Kagawa ◽  
Shiho Torashima ◽  
Masahiro Yamaguchi
Keyword(s):  
Imaging System ◽  
Complementary Metal Oxide Semiconductor ◽  
Image Sensor ◽  
Image Sensors ◽  
Computational Imaging ◽  
Field Of View ◽  
Oxide Semiconductor ◽  
Back Side ◽  
Cmos Image Sensors ◽  
Rich Information

A lensless camera is an ultra-thin computational-imaging system. Existing lensless cameras are based on the axial arrangement of an image sensor and a coding mask, and therefore, the back side of the image sensor cannot be captured. In this paper, we propose a lensless camera with a novel design that can capture the front and back sides simultaneously. The proposed camera is composed of multiple coded image sensors, which are complementary-metal-oxide-semiconductor~(CMOS) image sensors in which air holes are randomly made at some pixels by drilling processing. When the sensors are placed facing each other, the object-side sensor works as a coding mask and the other works as a sparsified image sensor. The captured image is a sparse coded image, which can be decoded computationally by using compressive-sensing-based image reconstruction. We verified the feasibility of the proposed lensless camera by simulations and experiments. The proposed thin lensless camera realizes super field-of-view imaging without lenses or coding masks, and therefore can be used for rich information sensing in confined spaces. This work also suggests a new direction in the design of CMOS image sensors in the era of computational imaging.

scholarly journals Proximity Gettering Design of Hydrocarbon–Molecular–Ion–Implanted Silicon Wafers Using Dark Current Spectroscopy for CMOS Image Sensors

Sensors ◽  
2019 ◽  
Vol 19 (9) ◽  
pp. 2073 ◽  
Author(s):  
Kazunari Kurita ◽  
Takeshi Kadono ◽  
Satoshi Shigematsu ◽  
Ryo Hirose ◽  
Ryosuke Okuyama ◽  
...  
Keyword(s):  
Dark Current ◽  
Image Sensor ◽  
Image Sensors ◽  
Silicon Wafers ◽  
Device Fabrication ◽  
Oxide Semiconductor ◽  
Device Performance ◽  
Molecular Ion ◽  
Cmos Image Sensors ◽  
Ion Implanted

We developed silicon epitaxial wafers with high gettering capability by using hydrocarbon–molecular–ion implantation. These wafers also have the effect of hydrogen passivation on process-induced defects and a barrier to out-diffusion of oxygen of the Czochralski silicon (CZ) substrate bulk during Complementary metal-oxide-semiconductor (CMOS) device fabrication processes. We evaluated the electrical device performance of CMOS image sensor fabricated on this type of wafer by using dark current spectroscopy. We found fewer white spot defects compared with those of intrinsic gettering (IG) silicon wafers. We believe that these hydrocarbon–molecular–ion–implanted silicon epitaxial wafers will improve the device performance of CMOS image sensors.

A 4-tap global shutter pixel with enhanced IR sensitivity for VGA time-of-flight CMOS image sensors

2020 ◽  
Vol 2020 (7) ◽  
pp. 103-1-103-6
Author(s):  
Taesub Jung ◽  
Yonghun Kwon ◽  
Sungyoung Seo ◽  
Min-Sun Keel ◽  
Changkeun Lee ◽  
...  
Keyword(s):  
Time Of Flight ◽  
Light Sensitivity ◽  
Image Sensor ◽  
Image Sensors ◽  
Double Sampling ◽  
Back Side ◽  
Long Distance ◽  
Correlated Double Sampling ◽  
Cmos Image Sensors ◽  
Side Illumination

An indirect time-of-flight (ToF) CMOS image sensor has been designed with 4-tap 7 μm global shutter pixel in back-side illumination process. 15000 e- of high full-well capacity (FWC) per a tap of 3.5 μm pitch and 3.6 e- of read-noise has been realized by employing true correlated double sampling (CDS) structure with storage gates (SGs). Noble characteristics such as 86 % of demodulation contrast (DC) at 100MHz operation, 37 % of higher quantum efficiency (QE) and lower parasitic light sensitivity (PLS) at 940 nm have been achieved. As a result, the proposed ToF sensor shows depth noise less than 0.3 % with 940 nm illuminator in even long distance.

Fabrication of Back-Side Illuminated Complementary Metal Oxide Semiconductor Image Sensor Using Compliant Bump

2010 ◽  
Vol 49 (4) ◽  
pp. 04DB01 ◽  
Author(s):  
Naoya Watanabe ◽  
Isao Tsunoda ◽  
Takayuki Takao ◽  
Koichiro Tanaka ◽  
Tanemasa Asano
Keyword(s):  
Metal Oxide ◽  
Complementary Metal Oxide Semiconductor ◽  
Image Sensor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Back Side

scholarly journals A Stacked Back Side-Illuminated Voltage Domain Global Shutter CMOS Image Sensor with a 4.0 μm Multiple Gain Readout Pixel

Sensors ◽  
2020 ◽  
Vol 20 (2) ◽  
pp. 486
Author(s):  
Ken Miyauchi ◽  
Kazuya Mori ◽  
Toshinori Otaka ◽  
Toshiyuki Isozaki ◽  
Naoto Yasuda ◽  
...  
Keyword(s):  
Dynamic Range ◽  
High Sensitivity ◽  
Cmos Image Sensor ◽  
Light Sensitivity ◽  
Image Sensor ◽  
Motion Artifacts ◽  
Oxide Semiconductor ◽  
Storage Capacitor ◽  
Cmos Process ◽  
Back Side

A backside-illuminated complementary metal-oxide-semiconductor (CMOS) image sensor with 4.0 μm voltage domain global shutter (GS) pixels has been fabricated in a 45 nm/65 nm stacked CMOS process as a proof-of-concept vehicle. The pixel components for the photon-to-voltage conversion are formed on the top substrate (the first layer). Each voltage signal from the first layer pixel is stored in the sample-and-hold capacitors on the bottom substrate (the second layer) via micro-bump interconnection to achieve a voltage domain GS function. The two sets of voltage domain storage capacitor per pixel enable a multiple gain readout to realize single exposure high dynamic range (SEHDR) in the GS operation. As a result, an 80dB SEHDR GS operation without rolling shutter distortions and motion artifacts has been achieved. Additionally, less than −140dB parasitic light sensitivity, small noise floor, high sensitivity and good angular response have been achieved.

scholarly journals Practical Methodologies in Restoring Initial Failure Mode and Backside Focused Ion Beam Cross-Section for Defect Visualization

2021 ◽  
Author(s):  
Alvina Jean Tampos ◽  
Karl Villareal
Keyword(s):  
Failure Mode ◽  
Cross Section ◽  
Focused Ion Beam ◽  
Failure Modes ◽  
Ion Beam ◽  
Image Sensor ◽  
Fault Isolation ◽  
Third Party ◽  
Oxide Semiconductor ◽  
Back Side

Abstract Complementary Metal-Oxide Semiconductor (CMOS) Image Sensors are gaining popularity most especially in Automotive Safety and Advanced Driver-Assistance Systems (ADAS) applications. Customer application modules involve oftentimes a third party supplier. When failures involve interaction between an image sensor die and the customer's module, the Failure Analyst has to know the exact failure mechanism to pinpoint whether root cause is in the die fabrication (fab) or packaging assembly (third party supplier). Challenges can befall the analyst: failure modes can recover which renders the unit functional and laboratories most often do not have complete sophisticated analytical laboratory equipment for electrical testing, fault isolation and sample preparation. In this paper, a case study of a CMOS Image Sensor is presented wherein the failure mode recovered which was restored and how the structural limitations were overcome for fault isolation on both front- and back-side. A modified process flow was performed to visualize the defect through backside Focused Ion Beam (FIB) cross-section.

300mm Scaling of Critical Silicon Etches for Image Sensor Wafer-Level Packaging Based on Tessera's MVP (TSV) Technology

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 002254-002271
Author(s):  
Dave Thomas ◽  
Matthew Muggeridge ◽  
Mike Steel ◽  
Dorleta Cortaberria Sanz ◽  
Hefin Griffiths ◽  
...  
Keyword(s):  
High Performance ◽  
Form Factors ◽  
Image Sensor ◽  
Electrical Performance ◽  
Depth Range ◽  
Back Side ◽  
Wafer Level ◽  
Wafer Level Packaging ◽  
Profile Control ◽  
Bond Pads

Miniature, high performance camera modules are found in a range of consumer devices including phones, PDAs, cameras and gaming consoles. According to Gartner the $1B image sensor market will grow to $2.3B by 2013. Image sensor packaging technologies are increasingly required to deliver greater reliability within smaller form factors. Tessera's OptiML™ Micro Via Pad (MVP) wafer-level packaging technology is in production on 200mm wafers. This paper will report on the first joint activity that scales this technology to 300mm. We focus on three critical silicon etches that form the back-bone of the structure. These etches are carried out from the wafer back-side while bonded to a glass carrier. First there is a blanket dry etch. This removes stress introduced by the back-grind. Uniformity control to < ±5% is essential for this process. Second, after a lithography step, tapered silicon trenches are etched forming streets to a certain depth. The trench etch uniformity is critical because it defines the depth range for the subsequent Vias. Profile control is needed to ease the subsequent spray-coat lithography. Lastly, vias are then etched down to metal bond pads on the device side of the wafer. CD and taper control is required here both within wafer and between wafers. End-pointing represents a way of ensuring process reproducibility. In 2010 Tessera carried out 300mm demos with key suppliers. As part of this activity SPTS scaled the above critical silicon etches. The wafers were further processed into functional die. We will describe the etch equipment used, report on the critical processes developed emphasizing the relationships between 200mm and 300mm results and the essential control parameters. We will also demonstrate successful scaling by including data on the electrical performance of packaged devices.

Transient analysis of signal charge transfer in long diffused regions of spectroscopic image sensors

1992 ◽  
Vol 70 (10-11) ◽  
pp. 1086-1091
Author(s):  
David A. B. Dobson ◽  
Savvas G. Chamberlain
Keyword(s):  
Charge Transfer ◽  
High Performance ◽  
Image Sensor ◽  
Image Sensors ◽  
Oxide Semiconductor ◽  
Transfer Time ◽  
Experimental Image ◽  
Experimental Side ◽  
Flow Through ◽  
Effect Transistor

This paper presents the results of a study of charge transfer time in long doped semiconductor regions. These regions are used to collect and store charge in high performance image sensors. The effect of dopant concentration on charge transfer time was studied using a novel two-dimensional device simulation tool. It was found that the delay associated with the long storage region only becomes significant for doping concentrations that are not degenerate. The effect of storage diffusion length on charge transfer time was also studied for degenerately doped structures. For these structures, it was found that the delay is much less than the conventional belief that the delay is proportional to the square of the diffusion dimension the electrons traverse. It was also found that the diffusion dimension affects the charge transfer time indirectly through the back biasing of the transfer metal oxide semiconductor field effect transistor (MOSFET). Shorter diffusions initially cause a larger back biasing of the transfer MOSFET, decreasing the maximum current flow through the device. On the experimental side, novel image sensor devices were designed that incorporate some of the results discussed above. Experimental image sensor structures were analyzed to study charge transfer time and relate the results to the computer simulations.

scholarly journals Automatic Range Adjustment of the Fluorescence Immunochromatographic Assay Based on Image Processing

Sensors ◽  
2019 ◽  
Vol 20 (1) ◽  
pp. 209 ◽  
Author(s):  
Ruixin Jiang ◽  
Huihuang Wu ◽  
Jianpeng Yang ◽  
Haiyan Jiang ◽  
Min Du ◽  
...  
Keyword(s):  
Image Processing ◽  
Point Of Care ◽  
Strong Stability ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Image Sensors ◽  
Oxide Semiconductor ◽  
Detection Sensitivity ◽  
Immunochromatographic Assay ◽  
Detection Range

As an emerging technology, fluorescence immunochromatographic assay (FICA) has the advantages of high sensitivity, strong stability and specificity, which is widely used in the fields of medical testing, food safety and environmental monitoring. The FICA reader based on image processing meets the needs of point-of-care testing because of its simple operation, portability and fast detection speed. However, the image gray level of common image sensors limits the detection range of the FICA reader, and high-precision image sensors are expensive, which is not conducive to the popularization of the instrument. In this paper, FICA strips’ image was collected using a common complementary metal oxide semiconductor (CMOS) image sensor and a range adjustment mechanism was established to automatically adjust the exposure time of the CMOS image sensor to achieve the effect of range expansion. The detection sensitivity showed a onefold increase, and the upper detection limit showed a twofold increase after the proposed method was implemented. In addition, in the experiments of linearity and accuracy, the fitting degree (R2) of the fitted curves both reached 0.999. Therefore, the automatic range adjustment method can obviously improve the detection range of the FICA reader based on image processing.

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