In Vivo Evaluation of a Subcutaneously Injectable Implant with a Low-Power Photoplethysmography ASIC for Animal Monitoring

Photoplethysmography is an extensively-used, portable, and noninvasive technique for measuring vital parameters such as heart rate, respiration rate, and blood pressure. The deployment of this technology in veterinary medicine has been hindered by the challenges in effective transmission of light presented by the thick layer of skin and fur of the animal. We propose an injectable capsule system to circumvent these limitations by accessing the subcutaneous tissue to enable reliable signal acquisition even with lower light brightness. In addition to the reduction of power usage, the injection of the capsule offers a less invasive alternative to surgical implantation. Our current prototype combines two application-specific integrated circuits (ASICs) with a microcontroller and interfaces with a commercial light emitting diode (LED) and photodetector pair. These ASICs implement a signal-conditioning analog front end circuit and a frequency-shift keying (FSK) transmitter respectively. The small footprint of the ASICs is the key in the integration of the complete system inside a 40-mm long glass tube with an inner diameter of 4 mm, which enables its injection using a custom syringe similar to the ones used with microchip implants for animal identification. The recorded data is transferred wirelessly to a computer for post-processing by means of the integrated FSK transmitter and a software-defined radio. Our optimized LED duty cycle of 0.4% at a sampling rate of 200 Hz minimizes the contribution of the LED driver (only 0.8 mW including the front-end circuitry) to the total power consumption of the system. This will allow longer recording periods between the charging cycles of the batteries, which is critical given the very limited space inside the capsule. In this work, we demonstrate the wireless operation of the injectable system with a human subject holding the sensor between the fingers and the in vivo functionality of the subcutaneous sensing on a pilot study performed on anesthetized rat subjects.

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Low Power CMOS Electrocardiogram Amplifier Design for Wearable Cardiac Screening

International Journal of Electrical and Computer Engineering (IJECE) ◽

10.11591/ijece.v8i3.pp1830-1836 ◽

2018 ◽

Vol 8 (3) ◽

pp. 1830

Author(s):

Ow Tze Weng ◽

Suhaila Isaak ◽

Yusmeeraz Yusof

Keyword(s):

Low Power ◽

Electromagnetic Interference ◽

Flicker Noise ◽

Low Frequency ◽

Total Power ◽

Signal Acquisition ◽

Cardiac Screening ◽

Rejection Ratio ◽

Front End ◽

Total Power Consumption

The trend of health care screening devices in the world is increasingly towards the favor of portability and wearability. This is because these wearable screening devices are not restricting the patient’s freedom and daily activities. While the demand of low power and low cost biomedical system on chip is increasing in exponential way, the front-end electrocardiogram (ECG) amplifiers are still suffering from flicker noise for low frequency cardiac signal acquisition, 50Hz power line electromagnetic interference, and the large unstable input offsets due to the electrode-skin interface is not attached properly. In this paper, a CMOS based ECG amplifier that suitable for low power wearable cardiac screening is proposed. The amplifier adopts the highly stable folded cascode topology and later being implemented into RC feedback circuit for low frequency DC offset cancellation. By using 0.13µm CMOS technology from Silterra, the simulation results show that this front-end circuit can achieve a very low input referred noise of 1pV/Hz1/2 and high common mode rejection ratio of 174.05dB. It also gives voltage gain of 75.45dB with good power supply rejection ratio of 92.12dB. The total power consumption is only 3µW and thus suitable to be implemented with further signal processing and classification back end for low power wearable biomedical device.<br /><br />

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High Gain and Low Noise Single Balanced Wireless Receiver Front-End Circuit Design

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.284-287.2647 ◽

2013 ◽

Vol 284-287 ◽

pp. 2647-2651

Author(s):

Zhe Yang Huang ◽

Che Cheng Huang ◽

Jung Mao Lin ◽

Chung Chih Hung

Keyword(s):

Return Loss ◽

Noise Figure ◽

High Gain ◽

Low Noise ◽

Total Power ◽

Cmos Process ◽

Chip Area ◽

Wireless Receiver ◽

Front End ◽

Total Power Consumption

This paper presents a wideband wireless receiver front-end for 3.1-5.0GHz band group-1 (BG-1) WiMedia application. The front-end circuits are designed in 0.18um standard CMOS process. The experimental results show the maximum conversion power gain is 45.5dB; minimum noise figure is 2.9dB. Input return loss is lower than -9.3dB and output return loss is lower than -6.8dB. The maximum LO conversion power is 0dBm. 3dB working frequency is 1.9GHz (3.1GHz-5.0GHz) Total power consumption is 24.3mW including LNA, mixer and all buffers. Total chip area is 1.27mm2 including dummy and pads.

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Multi-Channel Data Acquisition System Based on FPGA and STM32

Xibei Gongye Daxue Xuebao/Journal of Northwestern Polytechnical University ◽

10.1051/jnwpu/20203820351 ◽

2020 ◽

Vol 38 (2) ◽

pp. 351-358

Author(s):

Yue Zhang ◽

Linwei Tao

Keyword(s):

Power Consumption ◽

Low Power ◽

Dynamic Range ◽

Sampling Rate ◽

High Capacity ◽

Acquisition System ◽

Total Power ◽

Low Power Consumption ◽

Signal Acquisition ◽

And Storage

In order to realize the acquisition and storage of underwater acoustic signals for aiming at the requirements of multi-channel, low power consumption and small volume for underwater receiver extension of sonar system, a multi-channel signal acquisition and storage system based on FPGA and STM32 with variable number of working channels and sampling frequency is designed, in which the system is consisted of 8 pieces, 8 channel and 24 bits high dynamic range Δ-Σ ADS1278 ADC chip to synchronous multi-channel analog signal acquisition. FPGA, as the acquisition sequence and logic control, reads and collates the ADC chip data and writes it into the internal high-capacity FIFO, and adds corresponding operations according to the characteristics of FIFO in an application. SMT32 single-chip microcomputer reads the FIFO data through the high-speed SPI interface with FPGA and writes the multi-channel data into the high-capacity SD card. The testing results have verified that the system has characteristics such as stable and reliable, easy configuration, low power consumption, can guarantee the multichannel data serial transmission, storage, accurate, up to 64 analog signals at the same time the real-time collection and storage, top 20 kHz sampling rate, the system total power of the system of about 3W, data rates up to 100 Mb/s, fully meet the needs of underwater sound acquisition system.

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In vivo evaluation of an electroenzymatic glucose sensor implanted in subcutaneous tissue

Biosensors and Bioelectronics ◽

10.1016/0956-5663(92)85053-d ◽

1992 ◽

Vol 7 (10) ◽

pp. 709-714 ◽

Cited By ~ 54

Author(s):

K.W. Johnson ◽

J.J. Mastrototaro ◽

D.C. Howey ◽

R.L. Brunelle ◽

P.L. Burden-Brady ◽

...

Keyword(s):

Glucose Sensor ◽

Subcutaneous Tissue ◽

In Vivo Evaluation

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60 GHz Front-End Components for Broadband Wireless Communication in 130 nm CMOS Technology

Image Processing & Communications ◽

10.1515/ipc-2016-0006 ◽

2016 ◽

Vol 21 (1) ◽

pp. 67-77

Author(s):

Vasilis Kolios ◽

Konstantinos Giannakidis ◽

Grigorios Kalivas

Keyword(s):

Power Consumption ◽

Phase Noise ◽

Supply Voltage ◽

Cmos Technology ◽

Total Power ◽

Spectral Space ◽

60 Ghz ◽

Front End ◽

Total Power Consumption ◽

5 Ghz

Abstract The over 5 GHz available spectral space allocated worldwide around the 60 GHz band, is very promising for very high data rate wireless short-range communications. In this article we present two key components for the 60 GHz front-end of a transceiver, in 130 nm RF CMOS technology: a single-balanced mixer with high Conversion Gain (CG), reduced Noise Figure (NF) and low power consumption, and an LC cross-coupled Voltage Controlled Oscillator (VCO) with very good linearity, with respect to Vctrl, and very low Phase Noise (PN). In both circuits, custom designed inductors and a balun structure for the mixer are employed, in order to enhance their performance. The VCO’s inductor achieves an inductance of 198 pH and a quality factor (Q) of 30, at 30 GHz. The balun shows less than 1o Phase Imbalance (PI) and less than 0.2 dB Amplitude Imbalance (AI), from 57 to 66 GHz. The mixer shows a CG greater than 15 dB and a NF lower than 12 dB. In addition, the VCO achieves a Phase Noise lower than -106 dBc/Hz at 1 MHz offset, and shows great linearity for the entire band. Both circuits are biased with a 1.2 V supply voltage and the total power consumption is about 10.6 mW for the mixer and 10.92 mW for the VCO.

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In Vivo Evaluation of the Skin Tensile Strength by the Suction Method: Pilot Study Coping with Hysteresis and Creep Extension

ISRN Dermatology ◽

10.1155/2013/841217 ◽

2013 ◽

Vol 2013 ◽

pp. 1-7 ◽

Cited By ~ 7

Author(s):

Gérald E. Piérard ◽

Sébastien Piérard ◽

Philippe Delvenne ◽

Claudine Piérard-Franchimont

Keyword(s):

Mechanical Test ◽

Subcutaneous Tissue ◽

Normal Skin ◽

Test Procedure ◽

Connective Tissue Diseases ◽

Hysteresis Phenomenon ◽

In Vivo Evaluation ◽

Ehlers Danlos Syndrome ◽

Skin Conditions

From an engineering standpoint, both the skin and subcutaneous tissue act as interconnected load-transmitting structures. They are subject to a variety of intrinsic and environmental influences. Changes in the cutaneous viscoelasticity represent an important aspect in a series of skin conditions. The aim of this work was to explore the methodology of biomechanical measurements in order to better appreciate the evolution and severity of some connective tissue diseases. The Cutometer MPA 580 (C+K electronic) was used in the steep and progressive suction procedures. Adapting measurement modalities was explored in order to mitigate any variability in data collection. The repeat steep suction procedure conveniently reveals the creep phenomenon. By contrast, the progressive suction procedure highlights the hysteresis phenomenon. These viscoelastic characteristics are presently described using the 2 and 4 mm probes on normal skin and in scleroderma, acromegaly, corticosteroid-induced dermatoporosis, and Ehlers-Danlos syndrome. The apposition of an additional outer contention on the skin altered differently the manifestations of the creep extension and hysteresis among the tested skin conditions. Any change in the mechanical test procedure affects the data. In clinical and experimental settings, it is mandatory to adhere to a strict and controlled protocol.

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A 2.53 NEF 8-bit 10 kS/s 0.5 μm CMOS Neural Recording Read-Out Circuit with High Linearity for Neuromodulation Implants

Electronics ◽

10.3390/electronics10050590 ◽

2021 ◽

Vol 10 (5) ◽

pp. 590

Author(s):

Nishat Tarannum Tasneem ◽

Ifana Mahbub

Keyword(s):

Sampling Rate ◽

Sar Adc ◽

Oxide Semiconductor ◽

Total Power ◽

Cmos Process ◽

Noise Power ◽

Neural Signal ◽

Total Power Consumption ◽

Signal Recording ◽

Neural Signal Recording

This paper presents a power-efficient complementary metal-oxide-semiconductor (CMOS) neural signal-recording read-out circuit for multichannel neuromodulation implants. The system includes a neural amplifier and a successive approximation register analog-to-digital converter (SAR-ADC) for recording and digitizing neural signal data to transmit to a remote receiver. The synthetic neural signal is generated using a LabVIEW myDAQ device and processed through a LabVIEW GUI. The read-out circuit is designed and fabricated in the standard 0.5 μμm CMOS process. The proposed amplifier uses a fully differential two-stage topology with a reconfigurable capacitive-resistive feedback network. The amplifier achieves 49.26 dB and 60.53 dB gain within the frequency bandwidth of 0.57–301 Hz and 0.27–12.9 kHz to record the local field potentials (LFPs) and the action potentials (APs), respectively. The amplifier maintains a noise–power tradeoff by reducing the noise efficiency factor (NEF) to 2.53. The capacitors are manually laid out using the common-centroid placement technique, which increases the linearity of the ADC. The SAR-ADC achieves a signal-to-noise ratio (SNR) of 45.8 dB, with a resolution of 8 bits. The ADC exhibits an effective number of bits of 7.32 at a low sampling rate of 10 ksamples/s. The total power consumption of the chip is 26.02 μμW, which makes it highly suitable for a multi-channel neural signal recording system.

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A New Low Power Photoplethysmography Signal Acquisition System For Mental Stress Estimation

ASME 2021 30th Conference on Information Storage and Processing Systems ◽

10.1115/isps2021-65097 ◽

2021 ◽

Author(s):

Rajeev Kumar Pandey ◽

Paul C.-P. Chao

Keyword(s):

Standard Deviation ◽

Power Consumption ◽

Low Power ◽

Dynamic Range ◽

Acquisition System ◽

Total Power ◽

Signal Acquisition ◽

Readout System ◽

Pulse Rate Variability ◽

Total Power Consumption

Abstract This study presents a new low power and robust reflectance type optical Photoplethysmography (PPG) acquisition system for the mental distress estimation. The front-end circuit is implemented in the integrated chip with chip area of 1200μm × 1200μm and fabricated via TSMC T18 process. The sensing range of the readout circuit is 20nA to 11μA, and the total power consumption of the readout system is 100μW. The total power consumption of the design chip including the OLED driver power is 1.64mW. The designed acquisition system is applied to the wrist artery of the two healthy patients when they are calculating the pictorial puzzles and when they are in relax state. The statistical deviation of the heart rate (HR) from the average HR is increased when subjects are in the stress. Also, the standard deviation of pulse rate variability (PRV), the dynamic range of pulse repetition time (PRT), and the standard deviation of PRV derivative show the increasing temporal value when subjects are in the stress.

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