Emerging Real-Time Methodologies

2013 ◽  
pp. 140-159
Author(s):  
Giorgio C. Buttazzo
Keyword(s):  
Real Time ◽  
Research Community ◽  
Embedded Computing ◽  
Computing Systems ◽  
Performance Requirements ◽  
Controlled Systems ◽  
High Predictability ◽  
New Methodologies ◽  
On Chip ◽  
Complex Scenario

The number of computer-controlled systems has increased dramatically in our daily life. Processors and microcontrollers are embedded in most of the devices we use every day, such as mobile phones, cameras, media players, navigators, washing machines, biomedical devices, and cars. The complexity of such systems is increasing exponentially, pushed by the demand of new products with extra functionality, higher performance requirements, and low energy consumption. To cope with such a complex scenario, many embedded systems are adopting more powerful and highly integrated hardware components, such as multi-core systems, network-on-chip architectures, inertial subsystems, and special purpose co-processors. However, developing, analyzing, and testing the application software on these architectures is not easy, and new methodologies are being investigated in the research community to guarantee high predictability and efficiency in next generation embedded devices. This chapter presents some recent approaches proposed within the real-time research community aimed at achieving predictability, high modularity, efficiency, and adaptability in modern embedded computing systems.

Integrated environment for the analysis and design of distributed real-time embedded computing systems

2013 ◽  
Vol 39 (5) ◽  
pp. 242-254 ◽  
Author(s):  
R. L. Smelyansky ◽  
A. G. Bakhmurov ◽  
D. Yu. Volkanov ◽  
E. V. Chemeritskii
Keyword(s):  
Real Time ◽  
Embedded Computing ◽  
Computing Systems ◽  
Analysis And Design ◽  
Integrated Environment

scholarly journals On-Device Deep Learning Inference for System-on-Chip (SoC) Architectures

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 689
Author(s):  
Tom Springer ◽  
Elia Eiroa-Lledo ◽  
Elizabeth Stevens ◽  
Erik Linstead
Keyword(s):  
Machine Learning ◽  
Deep Learning ◽  
Real Time ◽  
Operating Systems ◽  
System On Chip ◽  
Low Latency ◽  
Management Framework ◽  
On Chip ◽  
Specialized Hardware ◽  
Deterministic Behavior

As machine learning becomes ubiquitous, the need to deploy models on real-time, embedded systems will become increasingly critical. This is especially true for deep learning solutions, whose large models pose interesting challenges for target architectures at the “edge” that are resource-constrained. The realization of machine learning, and deep learning, is being driven by the availability of specialized hardware, such as system-on-chip solutions, which provide some alleviation of constraints. Equally important, however, are the operating systems that run on this hardware, and specifically the ability to leverage commercial real-time operating systems which, unlike general purpose operating systems such as Linux, can provide the low-latency, deterministic execution required for embedded, and potentially safety-critical, applications at the edge. Despite this, studies considering the integration of real-time operating systems, specialized hardware, and machine learning/deep learning algorithms remain limited. In particular, better mechanisms for real-time scheduling in the context of machine learning applications will prove to be critical as these technologies move to the edge. In order to address some of these challenges, we present a resource management framework designed to provide a dynamic on-device approach to the allocation and scheduling of limited resources in a real-time processing environment. These types of mechanisms are necessary to support the deterministic behavior required by the control components contained in the edge nodes. To validate the effectiveness of our approach, we applied rigorous schedulability analysis to a large set of randomly generated simulated task sets and then verified the most time critical applications, such as the control tasks which maintained low-latency deterministic behavior even during off-nominal conditions. The practicality of our scheduling framework was demonstrated by integrating it into a commercial real-time operating system (VxWorks) then running a typical deep learning image processing application to perform simple object detection. The results indicate that our proposed resource management framework can be leveraged to facilitate integration of machine learning algorithms with real-time operating systems and embedded platforms, including widely-used, industry-standard real-time operating systems.

scholarly journals Design of a Real-Time Breakdown Voltage and On-Chip Temperature Monitoring System for Single Photon Avalanche Diodes

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 25
Author(s):  
Shijie Deng ◽  
Alan P. Morrison ◽  
Yong Guo ◽  
Chuanxin Teng ◽  
Ming Chen ◽  
...  
Keyword(s):  
Real Time ◽  
Breakdown Voltage ◽  
Count Rate ◽  
Single Photon ◽  
Photon Counting ◽  
Temperature Monitoring ◽  
Dark Count ◽  
Chip Temperature ◽  
Avalanche Diodes ◽  
On Chip

The design and implementation of a real-time breakdown voltage and on-chip temperature monitoring system for single photon avalanche diodes (SPADs) is described in this work. In the system, an on-chip shaded (active area of the detector covered by a metal layer) SPAD is used to provide a dark count rate for the breakdown voltage and temperature calculation. A bias circuit was designed to provide a bias voltage scanning for the shaded SPAD. A microcontroller records the pulses from the anode of the shaded SPAD and calculates its real-time dark count rate. An algorithm was developed for the microcontroller to calculate the SPAD’s breakdown voltage and the on-chip temperature in real time. Experimental results show that the system is capable of measuring the SPAD’s breakdown voltage with a mismatch of less than 1.2%. Results also show that the system can provide real-time on-chip temperature monitoring for the range of −10 to 50 °C with errors of less than 1.7 °C. The system proposed can be used for the real-time SPAD’s breakdown voltage and temperature estimation for dual-SPADs or SPAD arrays chip where identical detectors are fabricated on the same chip and one or more dummy SPADs are shaded. With the breakdown voltage and the on-chip temperature monitoring, intelligent control logic can be developed to optimize the performance of the SPAD-based photon counting system by adjusting the parameters such as excess bias voltage and dead-time. This is particularly useful for SPAD photon counting systems used in complex working environments such as the applications in 3D LIDAR imaging for geodesy, geology, geomorphology, forestry, atmospheric physics and autonomous vehicles.

Design of an Intelligent Data Cache with Replacement Policy

2019 ◽  
Vol 10 (2) ◽  
pp. 87-107
Author(s):  
B. Shameedha Begum ◽  
N. Ramasubramanian
Keyword(s):  
Real Time ◽  
Replacement Policy ◽  
Data Cache ◽  
Cache Performance ◽  
Performance Requirements ◽  
Novel Approach ◽  
Reconfigurable Caches ◽  
Real Time Applications ◽  
Hard Real Time ◽  
Replacement Algorithms

Embedded systems are designed for a variety of applications ranging from Hard Real Time applications to mobile computing, which demands various types of cache designs for better performance. Since real-time applications place stringent requirements on performance, the role of the cache subsystem assumes significance. Reconfigurable caches meet performance requirements under this context. Existing reconfigurable caches tend to use associativity and size for maximizing cache performance. This article proposes a novel approach of a reconfigurable and intelligent data cache (L1) based on replacement algorithms. An intelligent embedded data cache and a dynamic reconfigurable intelligent embedded data cache have been implemented using Verilog 2001 and tested for cache performance. Data collected by enabling the cache with two different replacement strategies have shown that the hit rate improves by 40% when compared to LRU and 21% when compared to MRU for sequential applications which will significantly improve performance of embedded real time application.

Sign in / Sign up

Export Citation Format

Share Document