An Arc Image Processing System Design and Testing

2012 ◽  
Vol 182-183 ◽  
pp. 758-762
Author(s):  
Yan Zhao ◽  
Jiao Min Liu

In this paper, research on a high speed arc image sampling and processing system based on DSP has been done. A RS-422A interface has been used to sample high speed image, A TMS320C40 high speed DSP and high frame rate CCD are used as the sensor. The optical image can be converted into digital image in this image sampling and processing system efficiently, with the high speed DSP and the high speed memories, to improve the data transfer speed and receive the image data correctly, DMA data communication technology is adopted. The test result shows that this system is very effective for arc research.

2014 ◽  
Vol 685 ◽  
pp. 306-309
Author(s):  
Hao Wang ◽  
Ze Yu Han

Visible light communication technology is a emerging wireless and optical communication technology developed after invention and application of white LED.In this paper, we have a research based on indoor visible light communication system of lighting white LED,discuss of the visible light communication channel characteristics,detailedly analysis of the indoor visible light communication link. This paper focuses on the modulation and demodulation method applied to visible light communication. In the past visible light communication is mainly used off keying modulation,however, the data transfer speed is limited due to the influence of ISI .This paper presents a solution based on OFDM modulation and demodulation, to reduce the impact brought from inter-symbol string under high data transfer speed.Based on data analysis and computer simulation,the program presented in this paper can be used as indoor lighting and high-speed data transmission.Finally, give scheme to achieve visible light communication modulation and demodulation,provide a theoretical basis for further experiments.


2012 ◽  
Vol 490-495 ◽  
pp. 2352-2356
Author(s):  
Feng Yang Duan ◽  
Li Min Chang ◽  
Ye Zhan

The technologies of image block, pyramid and multi-threading were used in this program to design the high-speed image generation display module and the processes of image data scheduling and mapping and solve the problems of large-capacity image data modeling and high-speed displaying. The technology of direct digital frequency synthesis (DDS) was used to design the Doppler shifting signal generation module and the multi-processor parallel system architecture, which can analog the Doppler frequency shifting of the data communication signals and solve the problem of the authenticity of communication signals during the simulated flight.


2002 ◽  
Author(s):  
Y. Kitaura ◽  
A. Kameyama ◽  
T. Terada ◽  
N. Uchitomi ◽  
T. Sudo ◽  
...  

Author(s):  
K.-H. Herrmann

The electron microscope is becoming a link in a highly sophisticated data processing system. The acquisition of image data supplied as a spatial distribution of current density requires a position sensitive electron detector which converts the current into digital information to be processed by image storages and computers to retrieve the information in which the user is interested. The ultimate goal of this interface is a lossless conversion with respect to both the number of pixels and the detection quantum efficiency (DQE) as well as high speed, minimum distortion, and linearity. I shall try to outline the present state of image read-out using both the conventional photoplate with spatial digitizing equipment and conventional TV sets. Subsequently it will be discussed how the future CCD technology (charge coupled device) may overcome some restrictions of present solutions.Every spatial recording device combines a conversion with a storage function in order to build up a signal-to-noise ratio (SNR) sufficient for detection. The following characteristics describe their performance:


2011 ◽  
Vol 393-395 ◽  
pp. 131-134
Author(s):  
Wei Ling Wang

A high-definition imaging and processing system is presented, which consists of a color CMOS image sensor, SRAM, CPLD and DSP. The CPLD implements the logic and timing control to the system. SRAM stores the image data, and DSP controls the image acquisition system through the SCCB. The timing sequence of the CMOS image sensor OV9620 is analyzed. The imaging part and the high speed image data memory unit are designed. The hardware design of the imaging system and processing algorithm are given. Because the CMOS digital cameras use color filter arrays to sample different spectral components, such as red, green, and blue, at the location of each pixel only one color sample is taken, and the other colors must be interpolated from neighboring samples. We use the edge-oriented adaptive interpolation algorithm for the edge pixels and bilinear interpolation algorithm for the non-edge pixels to improve the visual image quality. This method can get high processing speed, decrease the computational complexity, and effectively preserve the image edges.


2012 ◽  
Vol 482-484 ◽  
pp. 788-791
Author(s):  
Jian Feng Pan ◽  
Jian Fan ◽  
Jian Feng Xu ◽  
Ying Fang

The motion control system of CNC engraving machine,structured as NC embedded PC , is consists of the NC, a motion controller working as the lower computer, and the IPC, working as the supervisory computer. Both of them perform real time data communication through the PCI bus using DPRAM communication technology. It has many advantages such as consuming less response time, high speed and accuracy and so on. The experiment proves that the CNC system equipped with this technology has sensitive response and good real-time performance and stability.


2014 ◽  
Vol 568-570 ◽  
pp. 193-197
Author(s):  
Qiang Wu ◽  
Gen Wang ◽  
Xu Wen Li

A High-Speed LVDS Data Acquisition system is designed, with XILINX’s Virtex-5 FPGA as core processor as well as TI’s TMS320C6748 DSP for pre-processing and storing data. This system achieved a greater amount of image processing and faster image processing requirement. The system completed the dual LVDS image data acquisition according to the demand. The resolution of the image data is 320x257. Each image transmission frame rate of not less than 150 / sec. large amount of data throughout the system as well as real-time demanding is a big challenge for designer. The designer uses simulation tools from Mentor Graphics Hyperlynx to complete the stack and impedance calculation and signal quality simulation to ensure that the system is stable and reliable. This system also has better scalability and more reliable storage method than past designs. Recently, the system has completed testing verification and results show that this design is feasible and reliable.


Author(s):  
Amit Dengre ◽  
A.D. Gawande

The growth of high speed computer networks and that of the Internet, in particular, has increased the ease of Information Communication. Ironically, the cause for the development is also of the apprehension - use of digital formatted data. In comparison with Analog media, Digital media offers several distinct advantages such as high quality, easy editing, high fidelity copying, compression etc. But this type advancement in the field of data communication in other sense has hiked the fear of getting the data snooped at the time of sending it from the sender to the receiver. So, Information Security is becoming an inseparable part of Data Communication. In order to address this Information Security, Steganography plays an important role. Steganography is the art and science of writing hidden messages in such a way that no one apart from the sender and intended recipient even realizes there is a hidden message. In the current internet community, secure data transfer is limited due to its attack made on data communication. So more robust methods are chosen so that they ensure secured data transfer. One of the solutions which came to the rescue is the audio Steganography. But existing audio steganographic systems have poor interface, very low level implementation, difficult to understand and valid only for certain audio formats with restricted message size. Enhanced Audio Steganography (EAS) is one proposed system which is based on audio Steganography and cryptography & watermarking, ensures secure data transfer between the source and destination.


2014 ◽  
Vol 886 ◽  
pp. 556-559 ◽  
Author(s):  
Su Hua Chen ◽  
Zhi Meng Shu ◽  
Xu Fang

In order to improve high performance and low power of image processing embedded system, A high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor in this paper. In the whole system, A novel data transmission structure with a dual-port RAM which is divided into two halves, is applied to buff the high-speed real-time image data by Ping-pong technique. Because all work in the system is divided between the FPGA and DSP in the form of the pipelined, it is 25% higher than the processing system based on the single DSP in performance.


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