Test Method of Current Leakage for Dielectric Paste

2012 ◽  
Vol 220-223 ◽  
pp. 1573-1576
Author(s):  
Zhi Hong Hou
Keyword(s):  
Glass Substrate ◽  
Dielectric Layer ◽  
Screen Printing ◽  
Test Method ◽  
Conducting Layer ◽  
Current Leakage ◽  
Test Circuit ◽  
Conductive Line ◽  
Hybrid Microcircuit ◽  
Sintering Processes

A test method of current leakage for dielectric paste was proposed by simulating the application processes of dielectric paste for manufacturing the dielectric layer in the multilayer thick film hybrid microcircuit. That is, by screen printing and sintering processes, the sliver conducting layer was fabricated on the surface of glass substrate, and then dielectric layer, finally the glass substrate sample with conducting layer and dielectric layer was dipped in 5 Wt% NaCl aqueous solution. The conductive line was soldered on the silver conducting layer to form the test circuit, and powered with 5 volts direct power, the current in the test circuit was taken as the current leakage of the dielectric paste. The method may be used to evaluate the current leakage of dielectric paste.

Improving Performance of Laser-Printed Conductive Silver Lines

2012 ◽  
Vol 2012 (CICMT) ◽  
pp. 000377-000384
Author(s):  
Dustin Büttner ◽  
Klaus Krüger
Keyword(s):  
Thick Film ◽  
Screen Printing ◽  
Printed Electronics ◽  
Production Method ◽  
Silver Particles ◽  
Ceramic Substrates ◽  
High Speeds ◽  
Conductive Line ◽  
Ink Jet ◽  
Jet Printing

Within the last decade, large efforts were made to implement digital printing as a production method for printed electronics. Especially in production of thick-film electronics, innovation is pushed forward to overcome the lacks of established screen-printing regarding flexibility and tooling. Besides the numerous approaches in using ink-jet printing for printed electronics, researchers at Helmut Schmidt University already showed huge progress in applying electrophotography (“laser printing”) as a method to print conductive silver lines in order to form a conductive layout for thick-film circuits. Electrophotography is a solvent-free method, able to directly print silver toner onto ceramic substrates, forming a conductive line after firing. Benefits are high speeds and flexibility and a huge potential regarding precision. Now, after the feasibility of the method was proven and even functional conductive layouts like RFID coils were printed, the next steps have to be taken towards developing electrophotography to an applicable method in a thick-film production process. Thus, this paper describes the efforts in improving the method's performance. Different kinds of silver particles are tested towards their possibility of forming a silver toner. The resulting silver lines are examined regarding conductivity and printing precision. Also, surface treatment of substrates is considered as a method to reduce the number of required print cycles. Corresponding tests are performed. Furthermore, different firing profiles are tested towards their influence onto the resulting silver lines. Combining the results of these examinations, the performance of conductive silver lines could be improved significantly.

Mechanism Analysis of Field Emission for Nano-Diamond Films on Stainless Steel Substrates

2019 ◽  
Vol 807 ◽  
pp. 82-86
Author(s):  
Shu Yi Wei ◽  
Shi Jin Liu ◽  
Xiu Xia Zhang ◽  
Li Xin Guo
Keyword(s):  
Thin Film ◽  
Stainless Steel ◽  
Field Emission ◽  
Glass Substrate ◽  
Screen Printing ◽  
Diamond Films ◽  
Emission Characteristics ◽  
Emission Model ◽  
Mechanism Analysis ◽  
Steel Substrates

In this paper, nanodiamond films (NDF) were prepared on glass substrate by screen printing with nanodiamond. The NDF was printed with two layers and treated with different surface treatments.The field emission model of nanodiamond thin film was established. Field Emission of different Ratio was studyed. The mechanism by which the field emission characteristics of nanocrystalline diamond films are improved was analyzed.

Fabrication of Cu(In,Ga)Se2thin films by a combination of mechanochemical and screen-printing/sintering processes

2006 ◽  
Vol 203 (11) ◽  
pp. 2593-2597 ◽  
Author(s):  
T. Wada ◽  
Y. Matsuo ◽  
S. Nomura ◽  
Y. Nakamura ◽  
A. Miyamura ◽  
...  
Keyword(s):  
Screen Printing ◽  
Sintering Processes

INDIRECT TEST CIRCUIT FOR TESTING HIGH VOLTAGE FUSES IN OVERLOAD CONDITIONS

2016 ◽  
Vol 63 (0) ◽  
pp. 83-87
Author(s):  
Janusz KURASZKIEWICZ ◽  
Janusz BANDEL ◽  
Artur HEJDUK ◽  
Krzysztof KRASUSKI ◽  
Andrzej DZIERŻYŃSKI ◽  
...  
Keyword(s):  
High Voltage ◽  
Switching Time ◽  
Low Voltage ◽  
Short Circuit ◽  
Test Method ◽  
Indirect Test ◽  
Test Circuit ◽  
The Moment ◽  
Indirect Tests ◽  
A Current

During direct tests of high voltage fuses in overload conditions, the tested fuse has to carry the rated overload current at the rated voltage for a long enough time to interrupt the overcurrent. These types of tests cannot be done in short circuit laboratories. A short circuit generator cannot be excited for the length of time needed to complete the test. Therefore the indirect test method is often applied. It uses separate current and voltage circuits in sequence: first the fuse is supplied from a low voltage current circuit to conduct a current of the recommended intensity and, at the moment of the current interruption, the fuse is disconnected from the low voltage circuit and switched to a high voltage circuit. To ensure the equivalence of the direct and indirect tests the switching time from the current to the voltage circuit should be as short as possible. This paper describes a fast operating switch for use in such tests.

The Analysis on Influence of Test Error of Voltage Transformer Primary Test Circuit Causes on GIS and the Improvement of Test Method

2013 ◽  
Vol 734-737 ◽  
pp. 2689-2693
Author(s):  
Zhi Long Zhang ◽  
Hong Su
Keyword(s):  
High Voltage ◽  
Low Voltage ◽  
Coastal Region ◽  
Calculation Model ◽  
Test Method ◽  
Voltage Transformer ◽  
Long Distance ◽  
Test Error ◽  
Test Circuit ◽  
Primary Test

Recently, the Gas Insulated Station (GIS), small floor area ,convenient maintenance and good security ,is applied more and more extensively, but it becomes difficult to calibrate the error of measuring voltage transformer in main circuit on GIS with the application. According to the regulations, high voltage must be imposed on high voltage incoming line bushing in the high voltage test to voltage transformer. However, primary test circuit is long because of the long distance between the high voltage incoming line bushing and the tested voltage transformer, which makes the loop impedance large, so the measuring veracity is affected. In this paper, the Finite Element Method (FEM) is used to determine calculation model of each element on GIS station combined with 110kV station called rocket base in new coastal region, then Electromagnetic Transient Program (EMTP) is used to design the calculation model of the GIS station. The influence of test error of voltage transformer the primary test circuit causes is analyzed in theory. The experiment that the voltage imposed on low voltage side is used to measure the error of high voltage side is made to verify accuracy of the method in this paper.

A Test Method and Test Codes Generator for Improved HT Fault Model Based on NoC

2015 ◽  
Vol 724 ◽  
pp. 327-333
Author(s):  
Yu Zhu Zhang ◽  
Yi Gang He ◽  
Li Fen Yuan ◽  
Mao Xu Liu
Keyword(s):  
Signal Integrity ◽  
Fault Model ◽  
Simulation Software ◽  
Test Method ◽  
Pspice Simulation ◽  
Model Based ◽  
Test Circuit ◽  
On Chip ◽  
Test Requirements

NoC is a expand for SoC.The architecture of NoC is huge and complex,it leads to the crosstalk fault between internal transmission of NoC increasingly serious. Crosstalk serious impact on the signal integrity of on-chip system.A new test codes generator was designed by PSpice simulation software based on improved HT model. The generator was composed of a 16-bit counter and a 16-bit data selector.The generator was tested by PSpice software,the result showed that it satisfied the test requirements and had the advantage of portable. A crossstalk test method was proposed in this paper,we used this method on a test circuit,the result showed that the method could reduce the number of tests and save resource effectively.

Improvement of Performance of Electroluminescent Panel by Reducing the Thickness of Dielectric Layer

2019 ◽  
Vol 955 ◽  
pp. 20-24
Author(s):  
Michal Hrabal ◽  
Petr Dzik ◽  
Lukáš Omasta ◽  
Martin Vala ◽  
Michal Kalina ◽  
...  
Keyword(s):  
Dielectric Layer ◽  
Screen Printing ◽  
Low Cost ◽  
Dielectric Films ◽  
Driving Voltage ◽  
Large Area ◽  
Ink Jet ◽  
Printing Technique ◽  
Jet Printing ◽  
Material Printing

Alternating-current powder-based electroluminescence is currently the only technique for quick and easy preparation of large area, low cost electroluminescent panels by the means of material printing. Manufacturing of the panels is currently done exclusively by screen printing which is associated with deposition of much thicker layers than typical for other methods of material printing. Typical thickness of layers is in the order of tens of microns and more. The overall thickness of films forming the panel is however a serious shortcoming of the devices because the driving voltage for generation of light needs to be high and the thickness of layers render the panel non transparent from the side of the dielectric layer. One layer of dielectric films screen printed from the commercially available formulation is approximately 10 μm thick and cannot be effectively reduced anymore and thus another printing technique needs to be exploited. The goal of this work is to define and optimize a composition of a novel ink jet printing formulation of dielectric film and verification of parameters of the final layers for use in this type of technology. The major benefits of ink jet printed dielectric layer are the possible preparation of a panel emitting light from both sides with reduced driving voltage needed for its operation.

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