Design of a 0.7~3.8GHz Wideband Power Amplifier in 0.18-μm CMOS Process

2013 ◽  
Vol 364 ◽  
pp. 429-433
Author(s):  
Zhi Yuan Li ◽  
Xiang Ning Fan
Keyword(s):  
Power Amplifier ◽  
Power Output ◽  
Impedance Matching ◽  
Cmos Technology ◽  
Cmos Process ◽  
Power Gain ◽  
Matching Network ◽  
Gain Compression ◽  
Class A ◽  
Simulation Results

The design of a 0.7~3.8GHz CMOS power amplifier (PA) for multi-band applications in TSMC 0.18-μm CMOS technology is presented. The PA proposed in this paper uses lossy matching network and low Q multistage impedance matching network to improve wideband. To achieve maximum linearity, this PA operates in the Class-A regime. The post-layout simulation results show that the power amplifier achieves 21.9dB of power gain, 22.3dBm of 1dB compression power output at 2GHz. The power adder efficiency (PAE) at gain compression point is 17.8% at 2GHz.

Design of a 0.7~2.6GHz Wideband Power Amplifier in 0.18-μm CMOS Process

2014 ◽  
Vol 618 ◽  
pp. 543-547
Author(s):  
Zhou Yu ◽  
Xiang Ning Fan ◽  
Zai Jun Hua ◽  
Chen Xu
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Negative Feedback ◽  
Maximum Output Power ◽  
Cmos Process ◽  
Maximum Output ◽  
Power Gain ◽  
Class A ◽  
Simulation Results ◽  
Multi Mode

A power amplifier (PA) for multi-mode multi-standard transceiver which is implemented in a TSMC 0.18μm process is presented. The proposed PA uses matching compensation, lossy matching network and negative feedback technique to improve bandwidth. To achieve the linearity performance, the two-stage PA operates in Class-A regime. Simulation results show that the power amplifier achieves maximum output power of more than 24dBm in 0.7~2.6GHz. The output P1dBof the PA is larger than 22dBm. The simulated power gain is more than 27dB. The S11 is less than-10dB and the S22 is under-5dB.

scholarly journals A Compact 5 GHz Power Amplifier Using a Spiral Transformer for Enhanced Power Supply Rejection in 180-nm CMOS Technology

Electronics ◽  
2019 ◽  
Vol 8 (9) ◽  
pp. 1043 ◽  
Author(s):  
Young-Joe Choe ◽  
Hyohyun Nam ◽  
Jung-Dong Park
Keyword(s):  
Power Amplifier ◽  
Power Supply ◽  
Cmos Technology ◽  
Gain Compression ◽  
Power Added Efficiency ◽  
Class A ◽  
Power Supply Rejection Ratio ◽  
Chip Size ◽  
5 Ghz ◽  
Supply Rejection

We present a compact 5 GHz, class A power amplifier (PA) applicable for a wireless combo-chip that supports multiple radio systems in 180 nm CMOS technology. The proposed two-stage linear PA consists of a cascode input stage with a transformer-based balun, combined with a balancing capacitor as the load, where the single-ended signal is converted into the balanced output and a second-stage, class A push–pull amplifier with another transformer-based balun, which efficiently combines the output power differentially to drive a single-ended 50 Ω load. The proposed single-ended PA with an internal balanced configuration can achieve a power supply rejection ratio of 9.5 to 65.9 dB at 0.1 to 3.5 GHz, which is around a 12 to 37 dB improvement compared to a conventional single-ended PA with the same power gain. The results show that the proposed PA has a gain of 15.5 dB, an output-referred 1 dB gain compression point of 13 dBm, an output intercept point of 22 dBm with a 5 MHz frequency offset, an output saturated power of 15.4 dBm, and a peak power-added efficiency of 15%. The implemented PA consumes a DC current of 72 mA under 1.8 V supply. The core chip size is 0.65 mm2 without pads.

A 2.4GHz Radio-Over-Fiber Laser Diode Drive Amplifier in 0.18-um CMOS

2013 ◽  
Vol 433-435 ◽  
pp. 1463-1469 ◽  
Author(s):  
Yi Lin Zheng ◽  
Ying Mei Chen ◽  
Jian Wei Gong ◽  
Jian Guo Yao
Keyword(s):  
Laser Diode ◽  
Cmos Technology ◽  
Radio Over Fiber ◽  
Power Gain ◽  
Power Added Efficiency ◽  
Input And Output ◽  
Linear Amplifier ◽  
Simulation Results ◽  
On Chip ◽  
Dynamic Bias

The design of a 2.4GHz radio-over-fiber (ROF) laser diode drive amplifier using TSMC 0.18-um CMOS technology is presented in this paper. The proposed drive amplifier is a single-ended two-stage amplifier with the operating voltages of 1.8V and 3.3V. The technique of dynamic bias is employed to enhance linearity. The post simulation results show that the linear amplifier achieves the power gain of 26.26dB, the output 1dB compression point of 20.49dBm at 2.4GHz. The maximum power added efficiency (PAE) is 27.97%. The components are all on chip including the input and output matching network, and the die size is 1.065mm×0.73mm.

A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Premmilaah Gunasegaran ◽  
Jagadheswaran Rajendran ◽  
Selvakumar Mariappan ◽  
Yusman Mohd Yusof ◽  
Zulfiqar Ali Abdul Aziz ◽  
...  
Keyword(s):  
Power Consumption ◽  
Output Power ◽  
Power Amplifier ◽  
Maximum Output Power ◽  
Maximum Output ◽  
Power Gain ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Main Amplifier

Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal oxide semiconductor (CMOS) power amplifier (PA). Design/methodology/approach The linearization mechanism is executed with an aid of a passive linearizer implemented at the gate of the main amplifier to minimize the effect of Cgs capacitance through the generation of opposite phase response at the main amplifier. The inductor-less output matching network presents an almost lossless output matching network which contributes to high gain, PAE and output power. The linearity performance is improved without the penalty of power consumption, power gain and stability. Findings With this topology, the PA delivers more than 20 dB gain for the Bluetooth Low Energy (BLE) Band from 2.4 GHz to 2.5 GHz with a supply headroom of 1.8 V. At the center frequency of 2.45 GHz, the PA exhibits a gain of 23.3 dB with corresponding peak PAE of 40.11% at a maximum output power of 14.3 dBm. At a maximum linear output power of 12.7 dBm, a PAE of 37.3% has been achieved with a peak third order intermodulation product of 28.04 dBm with a power consumption of 50.58 mW. This corresponds to ACLR of – 20 dBc, thus qualifying the PA to operate for BLE operation. Practical implications The proposed technique is able to boost up the efficiency and output power, as well as linearize the PA closer to 1 dB compression point. This reduces the trade-off between linear output power and PAE in CMOS PA design. Originality/value The proposed CMOS PA can be integrated comfortably to a BLE transmitter, allowing it to reduce the transceiver’s overall power consumption.

Impedance-Matching Network Box of the RF Power Amplifier for the RFT-30 Cyclotron

2018 ◽  
Vol 73 (8) ◽  
pp. 1186-1190
Author(s):  
Ho Seung Song ◽  
Young Bae Kong ◽  
Eun Je Lee ◽  
Min Goo Hur
Keyword(s):  
Power Amplifier ◽  
Impedance Matching ◽  
Rf Power ◽  
Matching Network ◽  
Rf Power Amplifier

Design of Broadband GaN HEMT Power Amplifier with Ku Band

2012 ◽  
Vol 263-266 ◽  
pp. 39-42 ◽  
Author(s):  
Zhi Qun Cheng ◽  
Li Wei Jin ◽  
Wen Shi
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Operating Conditions ◽  
Power Gain ◽  
Power Added Efficiency ◽  
Gan Hemt ◽  
Dc Bias ◽  
Simulation Results ◽  
Two Stages ◽  
Ku Band

A broadband power amplifier module based on GaN HEMT operating Ku band is designed. TGF2023-02 Chip of GaN HEMT from TriQuint is modeled first. And then the module consists of two stages amplifiers. The first stage amplifier is single-stage amplifier and the second is two-way combiner amplifier. Wilkinson power divider, DC bias circuits and microstrip matching circuits are simulated and designed carefully. Simulation results showed that the amplifier module exhibits a power gain of 7 dB, power added efficiency of 13.9%, and an output power of 16 W under Vds=28 V, Vgs=-3.6 V, CW operating conditions at the frequency of 15 GHz.

Ultra Broadband Power Amplifier Based on GaN HEMT

2013 ◽  
Vol 475-476 ◽  
pp. 1685-1688
Author(s):  
Zhi Qun Cheng ◽  
Min Shi Jia ◽  
Xin Xiang Lian ◽  
Ya Luan
Keyword(s):  
Frequency Response ◽  
Output Power ◽  
Power Amplifier ◽  
Negative Feedback ◽  
Power Gain ◽  
Gan Hemt ◽  
Wide Range ◽  
Dc Bias ◽  
Simulation Results

An Ultra broadband power amplifier module based on GaN HEMT is studied. TGF2023-02 Chip of GaN HEMT from TriQuint Corporation is adopted and modeled first. The amplifier is designed with negative feedback technique. DC bias circuits and microstrip matching circuits are simulated and optimized carefully. Simulation results show that the amplifier module has a wide range frequency response from 3 to 8 GHz. It exhibits power gain of 7.6 dB, an output power of 37.5dBm under DC bias of Vds= 28 V, Vgs= -3.6 V at the frequency of 5.5 GHz.

scholarly journals Active inductor-based tunable impedance matching network for RF power amplifier application

Integration ◽  
2016 ◽  
Vol 52 ◽  
pp. 301-308 ◽  
Author(s):  
Alireza Saberkari ◽  
Saman Ziabakhsh ◽  
Herminio Martinez ◽  
Eduard Alarcón
Keyword(s):  
Power Amplifier ◽  
Impedance Matching ◽  
Active Inductor ◽  
Rf Power ◽  
Matching Network ◽  
Rf Power Amplifier ◽  
Tunable Impedance
Sign in / Sign up

Export Citation Format

Share Document