Design of a Fourth-Order Sigma-Delta Modulator for Audio Application

2013 ◽  
Vol 380-384 ◽  
pp. 3580-3583
Author(s):  
Ming Yuan Ren ◽  
Tuo Li ◽  
Chang Chun Dong

Based on requirements on high performance and high resolution of modulators, a fourth-order Sigma-Delta modulator for audio application is developed in this paper. The modulator is designed under the commercial 0.5μm CMOS process and the circuits are given simulations by Spectre. The sampling frequency of sigma-delta modulator is 11.264 MHz, and OSR is 256 within the 22 kHz signal bandwidth. Measure performance shows that Sigma-Delta modulator enables its maximum SNR to achieve 103.5dB, and the accuracy of Sigma-Delta modulator is up to 16 bit.

2014 ◽  
Vol 609-610 ◽  
pp. 964-967
Author(s):  
Jia Jun Zhou ◽  
Di Wang ◽  
Ying Kai Zhao ◽  
Hong Lin Xu ◽  
Xiao Wei Liu

In this paper, in order to enhance resolution and guarantee the stability of the micro-gyroscope, a high-resolution lowpass sigma-delta modulator is proposed. It employs single-loop fourth-order and full differential structure. The simulated result on the Simulink platform shows that the SNDR is 105.4dB and the effective number of bits (ENOB) is 17.22bits. The entire circuits are implemented with 0.5μm CMOS process. The simulated result on Cadence shows that the SNDR is 99.7dB. The modulator operates at a sampling frequency of 25.6MHz and the signal bandwidth is 100kHz with 128 oversampling ratio (OSR). The dynamic range (DR) is 120 dB approximately and the SNDR changes linearly with the input level.


2012 ◽  
Vol 503 ◽  
pp. 303-307
Author(s):  
Peng Fei Wang ◽  
Yuan Yuan ◽  
Dong Bo Wang ◽  
Xiao Wei Liu ◽  
Jun'an Liu

This paper presents a fourth-order sigma delta (ΣΔ)modulator applied in micro-inertial sensors. After a introduction of sigma-delta modulator and its application in micro-inertial sensors, the system-level analysis and design is given and the gain coefficients is calculated. By the use of root locus, the stability of high order ΣΔ modulator is analyzed and it is got the minimum value of quantizer gain k is 0.287. The simulation shows that the signal to noise ratio (SNR) is 121.6 dB and the effective number of bits (ENOB) is 19.91 bits. When input level is smaller than -6 dBFs, the quantizer and integrators would not be overload and work well.


2014 ◽  
Vol 609-610 ◽  
pp. 723-727
Author(s):  
Wen Jie Fan ◽  
Qiu Ye Lv ◽  
Chong He ◽  
Liang Yin ◽  
Xiao Wei Liu

Sigma-delta ADC outperforms the Nyquist ADC in precision and robustness by using oversampling and noise shaping. A fourth-order sigma-delta modulator of input feedforward architecture is designed and simulated in system-level. Input feedforward architecture has advantages of low output swing of integrators and simple structure. Proper circuit parameters are also presented in this paper. The simulation revealed that the modulator achieves 109 dB dynamic range in a signal bandwidth of 1 KHz with a sampling frequency of 250 KHz.


2012 ◽  
Vol 503 ◽  
pp. 207-210
Author(s):  
Wen Yan Liu ◽  
Bin Zhang ◽  
Long Chen ◽  
Chao Gao ◽  
Xiao Wei Liu

This paper reports on a system level design and analysis of a mash fourth-order sigma-delta (ΣΔ) modulator. Compared with a high-order single-loop ΣΔ modulator (ΣΔM), there’s no need to consider about the system stability of a mash ΣΔM, which has the advantages of better signal to quantization noise ratio (SQNR). System level simulation results indicate that the SQNR is 122.0 dB, and the effective number of bits (ENOB) is 19.97 bits when the over sampling ratio (OSR) is 128.


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