A Threshold Speed Computation Algorithm in Adaptive DVS Scheduling

2014 ◽  
Vol 519-520 ◽  
pp. 1071-1074
Author(s):  
Wei Qiang Sun ◽  
Shan Ren Nie
Keyword(s):  
Energy Consumption ◽  
Power Dissipation ◽  
Supply Voltage ◽  
Scheduling Algorithm ◽  
Dynamic Voltage Scaling ◽  
Computing Systems ◽  
Adaptive Scheme ◽  
Dynamic Voltage ◽  
Computation Algorithm ◽  
Circuit Power

Performance boosting of modern computing systems is constrained by the chip/circuit power dissipation. Dynamic voltage scaling (DVS) has been applied for reducing the energy consumption by dynamically changing the supply voltage. One can apply an adaptive scheme by computing a threshold speed of the supplied voltage, and adopting greedy online DVS scheduling algorithm when the voltage exceeds the threshold while choosing a conservative speed on the contrary. This paper presents an algorithm to determine the threshold speed. The proposed algorithm allows to obtaining the threshold speed for the adaptive DVS scheduling algorithm more efficiently.

Energy conscious scheduling with controlled threshold for precedence-constrained tasks on heterogeneous clusters

2016 ◽  
Vol 25 (3) ◽  
pp. 276-286 ◽  
Author(s):  
Nirmal Kaur ◽  
Savina Bansal ◽  
Rakesh Kumar Bansal
Keyword(s):  
Energy Consumption ◽  
High Performance Computing ◽  
High Performance ◽  
Scheduling Algorithm ◽  
Voltage Scaling ◽  
Dynamic Voltage Scaling ◽  
Heterogeneous Cluster ◽  
Dynamic Voltage ◽  
Computing Platforms ◽  
Performance Computing

Efficient task scheduling of concurrent tasks is one of the primary requirements for high-performance computing platforms. Recent advances in high-performance computing have resulted in widespread performance improvement though at the cost of increased energy consumption and other system resources. In this article, an energy conscious scheduling algorithm with controlled threshold has been developed for precedence-constrained tasks on heterogeneous cluster, which aims at lower makespan along with reduced energy consumption. Energy conscious scheduling with controlled threshold algorithm combines the benefits of dynamic voltage scaling with controlled threshold-based duplication strategy to achieve its objectives. Effectiveness of the proposed algorithm is analyzed in comparison with available duplication- and non-duplication-based scheduling algorithms (with and without dynamic voltage scaling approach) to ascertain its performance and energy consumption. Exhaustive simulation results on random and real-world graphs demonstrate that energy conscious scheduling algorithm with controlled threshold has the potential to reduce energy consumption and makespan.

scholarly journals Analysis On Power Gating Circuits Based Low Power VLSI Circuits (BCD Adder)

2021 ◽  
Vol 2089 (1) ◽  
pp. 012080
Author(s):  
M. Srinivas ◽  
K.V. Daya Sagar
Keyword(s):  
Energy Consumption ◽  
Low Power ◽  
Power Dissipation ◽  
Supply Voltage ◽  
Oxide Thickness ◽  
Cmos Technology ◽  
Digital Circuit ◽  
Leakage Power ◽  
Vlsi Circuits ◽  
Battery Life

Abstract Currently, energy consumption in the digital circuit is a key design parameter for emerging mobile products. The principal cause of the power dissipation during idle mode is leakage currents, which are rising dramatically. Sub-threshold leakage is increased by the scaling of threshold voltage when gate current leakage increases because oxide thickness is scaled. With rising demands for mobile devices, leakage energy consumption has received even greater attention. Since a mobile device spends most of its time in standby mode, leakage power savings need to prolong the battery life. That is why low power has become a significant factor in CMOS circuit design. The required design and simulation of an AND gate with the BSIM4 MOS parameter model at 27 0C, supply voltage of 0,70V with CMOS technology of 65nm are the validation of the suitability of the proposed circuit technology. AND simulation. The performance parameters for the two AND input gate are compared with the current MTCMOS and SCCMOS techniques, such as sub-threshold leakage power dissipations in active and standby modes, the dynamic dissipation, and propagation period. The proposed hybrid super cutoff complete stack technique compared to the current MTCMOS technology shows a reduction in sub-threshold dissipation power dissipation by 3. 50x and 1.15x in standby modes and active modes respectively. The hybrid surface-cutting technique also shows savings of 2,50 and 1,04 in power dissipation at the sub-threshold in standby modes and active modes compared with the existing SCCMOS Technique.

scholarly journals LOW POWER SYSTEM DESIGN BY COMBINING SOFTWARE PREFETCHING AND DYNAMIC VOLTAGE SCALING

2007 ◽  
Vol 16 (05) ◽  
pp. 745-767
Author(s):  
SUMITKUMAR N. PAMNANI ◽  
DEEPAK N. AGARWAL ◽  
GANG QU ◽  
DONALD YEUNG
Keyword(s):  
Energy Consumption ◽  
Low Power ◽  
Energy Saving ◽  
System Performance ◽  
Performance Enhancement ◽  
Voltage Scaling ◽  
Dynamic Voltage Scaling ◽  
Dynamic Voltage ◽  
Software Prefetching ◽  
Online Profiling

Performance-enhancement techniques improve CPU speed at the cost of other valuable system resources such as power and energy. Software prefetching is one such technique, tolerating memory latency for high performance. In this article, we quantitatively study this technique's impact on system performance and power/energy consumption. First, we demonstrate that software prefetching achieves an average of 36% performance improvement with 8% additional energy consumption and 69% higher power consumption on six memory-intensive benchmarks. Then we combine software prefetching with a (unrealistic) static voltage scaling technique to show that this performance gain can be converted to an average of 48% energy saving. This suggests that it is promising to build low power systems with techniques traditionally known for performance enhancement. We thus propose a practical online profiling based dynamic voltage scaling (DVS) algorithm. The algorithm monitors system's performance and adapts the voltage level accordingly to save energy while maintaining the observed system performance. Our proposed online profiling DVS algorithm achieves 38% energy saving without any significant performance loss.

ADAPTIVE DELAY CORRECTION FOR RUNTIME VARIATION IN DYNAMIC VOLTAGE SCALING SYSTEMS

2008 ◽  
Vol 17 (06) ◽  
pp. 1111-1128 ◽  
Author(s):  
DAVID WOLPERT ◽  
PAUL AMPADU
Keyword(s):  
Supply Voltage ◽  
Process Variation ◽  
Voltage Scaling ◽  
Dynamic Voltage Scaling ◽  
Ring Oscillator ◽  
New Method ◽  
Lookup Table ◽  
Worst Case ◽  
Dynamic Voltage ◽  
Delay Sensitivity

Temperature and voltage fluctuations affect delay sensitivity differently, as supply voltage is reduced. These differences make runtime variations particularly difficult to manage in dynamic voltage scaling systems, which adjust supply voltage in accordance with the required operating frequency. To include process variation in current table-lookup methods, a worst-case process is typically assumed. We propose a new method that takes process variation into account and reduces the excessive runtime variation guardbands. Our approach uses a ring oscillator to generate baseline frequencies, and employs a guardband lookup table to offset this baseline. The new method ensures robust operation and reduces power consumption by up to 20% compared with a method that assumes worst-case process variation in filling a lookup table.

scholarly journals Applying Dynamic Priority Scheduling Scheme to Static Systems of Pinwheel Task Model in Power-Aware Scheduling

2014 ◽  
Vol 2014 ◽  
pp. 1-9
Author(s):  
Ye-In Seol ◽  
Young-Kuk Kim
Keyword(s):  
Energy Consumption ◽  
Scheduling Algorithm ◽  
Priority Scheduling ◽  
Dynamic Priority ◽  
Task Model ◽  
Dynamic Voltage ◽  
Priority Method ◽  
Hard Real Time ◽  
Static Systems ◽  
Power Aware Scheduling

Power-aware scheduling reduces CPU energy consumption in hard real-time systems through dynamic voltage scaling (DVS). In this paper, we deal with pinwheel task model which is known as static and predictable task model and could be applied to various embedded or ubiquitous systems. In pinwheel task model, each task’s priority is static and its execution sequence could be predetermined. There have been many static approaches to power-aware scheduling in pinwheel task model. But, in this paper, we will show that the dynamic priority scheduling results in power-aware scheduling could be applied to pinwheel task model. This method is more effective than adopting the previous static priority scheduling methods in saving energy consumption and, for the system being still static, it is more tractable and applicable to small sized embedded or ubiquitous computing. Also, we introduce a novel power-aware scheduling algorithm which exploits all slacks under preemptive earliest-deadline first scheduling which is optimal in uniprocessor system. The dynamic priority method presented in this paper could be applied directly to static systems of pinwheel task model. The simulation results show that the proposed algorithm with the algorithmic complexity ofO(n) reduces the energy consumption by 10–80% over the existing algorithms.

A Robust SRAM Design for Ultra Dynamic Voltage Scalable VLSI System

2012 ◽  
Vol 182-183 ◽  
pp. 450-455
Author(s):  
Jun Yang ◽  
Na Bai ◽  
Wei Qi Wu ◽  
Wei Wei Shan ◽  
Zhi Kuang Cai
Keyword(s):  
Energy Supply ◽  
Supply Voltage ◽  
Schmitt Trigger ◽  
Cmos Technology ◽  
Dynamic Voltage Scaling ◽  
Voltage Range ◽  
Optimum Energy ◽  
Sram Design ◽  
Vlsi System ◽  
Dynamic Voltage

In this paper, a SRAM array targeting IBM 130nm CMOS technology is proposed for ultra dynamic voltage scaling (UDVS) application with better immunity against process variation. A type of modified Schmitt Trigger inverter is adopted in the SRAM design, which guarantee stable operations in both superthreshold and subthreshold supply voltage regions. Testing results demonstrate that the proposed SRAM array functions well in the supply voltage range of 150 mV to 1200 mV. The optimum-energy supply voltage point is about 400 mV for proposed UDVS SRAM array. And the energy at 400 mV decreases by 62.5% compared to that at 1200 mV.

scholarly journals Multi-objective hybrid genetic algorithm for task scheduling problem in cloud computing

2021 ◽  
Author(s):  
Poria Pirozmand ◽  
Ali Asghar Rahmani Hosseinabadi ◽  
Maedeh Farrokhzad ◽  
Mehdi Sadeghilalimi ◽  
Seyedsaeid Mirkamali ◽  
...  
Keyword(s):  
Genetic Algorithm ◽  
Cloud Computing ◽  
Energy Consumption ◽  
Scheduling Algorithm ◽  
Hybrid Genetic Algorithm ◽  
Computing System ◽  
Computing Systems ◽  
Cloud Computing System ◽  
Scheduling Heuristic ◽  
The Cost

AbstractThe cloud computing systems are sorts of shared collateral structure which has been in demand from its inception. In these systems, clients are able to access existing services based on their needs and without knowing where the service is located and how it is delivered, and only pay for the service used. Like other systems, there are challenges in the cloud computing system. Because of a wide array of clients and the variety of services available in this system, it can be said that the issue of scheduling and, of course, energy consumption is essential challenge of this system. Therefore, it should be properly provided to users, which minimizes both the cost of the provider and consumer and the energy consumption, and this requires the use of an optimal scheduling algorithm. In this paper, we present a two-step hybrid method for scheduling tasks aware of energy and time called Genetic Algorithm and Energy-Conscious Scheduling Heuristic based on the Genetic Algorithm. The first step involves prioritizing tasks, and the second step consists of assigning tasks to the processor. We prioritized tasks and generated primary chromosomes, and used the Energy-Conscious Scheduling Heuristic model, which is an energy-conscious model, to assign tasks to the processor. As the simulation results show, these results demonstrate that the proposed algorithm has been able to outperform other methods.

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