A Cost-Effective Approach of Hardware Random Number Generator

2014 ◽  
Vol 602-605 ◽  
pp. 2803-2806
Author(s):  
Xiao Xiao ◽  
Li Xuan Ye ◽  
Jun Pu
Keyword(s):  
Computer Simulation ◽  
Random Number ◽  
Random Number Generator ◽  
Cost Effective ◽  
Random Numbers ◽  
Number Generator ◽  
Randomness Test ◽  
Cost Effective Approach ◽  
Processing Module

This paper shows the research on hardware random number generator (HRNG). As truly random numbers are strongly required in encryption and computer simulation areas, developing a simple and inexpensive HRNG has significant value. The whole system is divided into the noise generating module and the processing module. After the numbers are generated, a randomness test has been carried out which indicates that the random numbers generated are truly random. It is concluded that the final product of this HRNG meets the requirements of the objectives.

scholarly journals Implementation of the Binary Random Number Generator Using the Knight Tour Problem

2016 ◽  
Vol 10 (4) ◽  
pp. 35 ◽  
Author(s):  
Ali Shakir Mahmood ◽  
Mohd Shafry Mohd Rahim ◽  
Nur Zuraifah Syazrah Othman
Keyword(s):  
Random Number ◽  
Random Number Generator ◽  
Security Analysis ◽  
Random Numbers ◽  
Number Generator ◽  
Test Results ◽  
Numerical Function ◽  
Randomness Test ◽  
Network Administrators ◽  
Strong Capacity

<p>A random number can be defined as a set of numbers produced by a numerical function, in which the next number is unpredictable and a relationship between successive occurrences is lacking. Moreover, these sequences cannot be reproduced unless the same generator function with an exact initial value is used. The design of a random number generator must overcome the previous problems of a low periodic and the capacity to reproduce the same sequence. This paper proposes the knight tour as a tool for generating pseudo random numbers. These random numbers can be use in the encryption process or in a password generator for network administrators. The randomness test suite is used to ensure the randomness of outcome sequences. Roughly, 75% of the test results obtained is better than the results from other works. The statistical properties and security analysis indicate that the knight tour application is highly successful in generating a pseudo random number with good statistical results, high linear complexity and strong capacity to withstand attacks.</p>

scholarly journals A Hardware Pseudo-Random Number Generator Using Stochastic Computing and Logistic Map

Micromachines ◽  
2020 ◽  
Vol 12 (1) ◽  
pp. 31
Author(s):  
Junxiu Liu ◽  
Zhewei Liang ◽  
Yuling Luo ◽  
Lvchen Cao ◽  
Shunsheng Zhang ◽  
...  
Keyword(s):  
Random Number ◽  
Chaotic Map ◽  
Logistic Map ◽  
Random Number Generator ◽  
Alternative Methods ◽  
Random Numbers ◽  
Number Generator ◽  
Stochastic Computing ◽  
Pseudo Random Number ◽  
Pseudo Random Number Generator

Recent research showed that the chaotic maps are considered as alternative methods for generating pseudo-random numbers, and various approaches have been proposed for the corresponding hardware implementations. In this work, an efficient hardware pseudo-random number generator (PRNG) is proposed, where the one-dimensional logistic map is optimised by using the perturbation operation which effectively reduces the degradation of digital chaos. By employing stochastic computing, a hardware PRNG is designed with relatively low hardware utilisation. The proposed hardware PRNG is implemented by using a Field Programmable Gate Array device. Results show that the chaotic map achieves good security performance by using the perturbation operations and the generated pseudo-random numbers pass the TestU01 test and the NIST SP 800-22 test. Most importantly, it also saves 89% of hardware resources compared to conventional approaches.

scholarly journals RRAM Random Number Generator Based on Train of Pulses

Electronics ◽  
2021 ◽  
Vol 10 (15) ◽  
pp. 1831
Author(s):  
Binbin Yang ◽  
Daniel Arumí ◽  
Salvador Manich ◽  
Álvaro Gómez-Pau ◽  
Rosa Rodríguez-Montañés ◽  
...  
Keyword(s):  
Random Number ◽  
Random Number Generator ◽  
Random Access ◽  
Pulse Amplitude ◽  
Resistive Random Access Memory ◽  
Random Numbers ◽  
Number Generator ◽  
Security Applications ◽  
Device Resistance ◽  
New Strategy

In this paper, the modulation of the conductance levels of resistive random access memory (RRAM) devices is used for the generation of random numbers by applying a train of RESET pulses. The influence of the pulse amplitude and width on the device resistance is also analyzed. For each pulse characteristic, the number of pulses required to drive the device to a particular resistance threshold is variable, and it is exploited to extract random numbers. Based on this behavior, a random number generator (RNG) circuit is proposed. To assess the performance of the circuit, the National Institute of Standards and Technology (NIST) randomness tests are applied to evaluate the randomness of the bitstreams obtained. The experimental results show that four random bits are simultaneously obtained, passing all the applied tests without the need for post-processing. The presented method provides a new strategy to generate random numbers based on RRAMs for hardware security applications.

A Dynamic Equilibrium Algorithm to Enhance Randomness in TRNG

2018 ◽  
Vol 27 (06) ◽  
pp. 1850095
Author(s):  
Chenyang Guo ◽  
Yujie Zhou
Keyword(s):  
Random Number ◽  
Dynamic Equilibrium ◽  
Random Number Generator ◽  
Pass Rate ◽  
Compression Rate ◽  
Number Generator ◽  
Post Processing ◽  
Processing Module ◽  
Great Solution ◽  
Software And Hardware

In this paper, a new method is proposed for randomness enhancement. The approach is called the dynamic equilibrium algorithm (DEA). It is used to solve the problems existing in the true random number generator (TRNG). First, the advantages and defects of LFSR as a post-processing module are discussed. When sampling 1000 groups of data, only 517 groups can pass all 15 tests in SP800-22 with a pass rate of 0.981. DEA is actually a great solution to this problem. The essence of DEA is to guarantee the approximately uniform distribution of the overlapping template to improve the bit-entropy by the compression of the data. This method is easy to implement in both software and hardware. The pass rate increases more than 40% with a low compression rate.

scholarly journals Self-clocking fast and variation tolerant true random number generator based on a stochastic mott memristor

2020 ◽  
Author(s):  
Gwangmin Kim ◽  
Jae Hyun In ◽  
Hakseung Rhee ◽  
Woojoon Park ◽  
Hanchan Song ◽  
...  
Keyword(s):  
Random Number ◽  
Random Number Generator ◽  
Random Number Generation ◽  
Harsh Environments ◽  
Random Numbers ◽  
Number Generator ◽  
High Tolerance ◽  
Stochastic Oscillation ◽  
Advanced Method ◽  
Intrinsic Stochasticity

Abstract The intrinsic stochasticity of the memristor can be used to generate true random numbers, essential for non-decryptable hardware-based security devices. Here we propose a novel and advanced method to generate true random numbers utilizing the stochastic oscillation behavior of a NbOx mott memristor, exhibiting self-clocking, fast and variation tolerant characteristics. The random number generation rate of the device can be at least 40 kbs-1, which is the fastest record compared with previous volatile memristor-based TRNG devices. Also, its dimensionless operating principle provides high tolerance against both ambient temperature variation and device-to-device variation, enabling robust security hardware applicable in harsh environments.

scholarly journals Cryptographically Secure Pseudo-Random Number Generator IP-Core Based on SHA2 Algorithm

Sensors ◽  
2020 ◽  
Vol 20 (7) ◽  
pp. 1869 ◽  
Author(s):  
Luca Baldanzi ◽  
Luca Crocetti ◽  
Francesco Falaschi ◽  
Matteo Bertolucci ◽  
Jacopo Belli ◽  
...  
Keyword(s):  
High Performance ◽  
Random Number ◽  
Random Number Generator ◽  
Random Number Generation ◽  
Random Numbers ◽  
Generation Process ◽  
Number Generator ◽  
Ip Core ◽  
Pseudo Random Number ◽  
Pseudo Random Number Generator

In the context of growing the adoption of advanced sensors and systems for active vehicle safety and driver assistance, an increasingly important issue is the security of the information exchanged between the different sub-systems of the vehicle. Random number generation is crucial in modern encryption and security applications as it is a critical task from the point of view of the robustness of the security chain. Random numbers are in fact used to generate the encryption keys to be used for ciphers. Consequently, any weakness in the key generation process can potentially leak information that can be used to breach even the strongest cipher. This paper presents the architecture of a high performance Random Number Generator (RNG) IP-core, in particular a Cryptographically Secure Pseudo-Random Number Generator (CSPRNG) IP-core, a digital hardware accelerator for random numbers generation which can be employed for cryptographically secure applications. The specifications used to develop the proposed project were derived from dedicated literature and standards. Subsequently, specific architecture optimizations were studied to achieve better timing performance and very high throughput values. The IP-core has been validated thanks to the official NIST Statistical Test Suite, in order to evaluate the degree of randomness of the numbers generated in output. Finally the CSPRNG IP-core has been characterized on relevant Field Programmable Gate Array (FPGA) and ASIC standard-cell technologies.

scholarly journals A Novel True Random Number Generator Based on Mouse Movement and a One-Dimensional Chaotic Map

2012 ◽  
Vol 2012 ◽  
pp. 1-9 ◽  
Author(s):  
Wang Xingyuan ◽  
Qin Xue ◽  
Teng Lin
Keyword(s):  
Random Number ◽  
Chaotic Map ◽  
Random Number Generator ◽  
Random Numbers ◽  
Number Generator ◽  
Initial Value ◽  
One Dimensional ◽  
True Random Number Generator ◽  
Mouse Movement ◽  
Real Value

We propose a novel true random number generator using mouse movement and a one-dimensional chaotic map. We utilize thex-coordinate of the mouse movement to be the length of an iteration segment of our TRNs and they-coordinate to be the initial value of this iteration segment. And, when it iterates, we perturb the parameter with the real value produced by the TRNG itself. And we find that the TRNG we proposed conquers several flaws of some former mouse-based TRNGs. At last we take experiments and test the randomness of our algorithm with the NIST statistical test suite; results illustrate that our TRNG is suitable to produce true random numbers (TRNs) on universal personal computers (PCs).

27 Random Numbers

2003 ◽  
Vol 13 (1) ◽  
pp. 235-240
Author(s):  
SIMON PEYTON JONES
Keyword(s):  
Random Number ◽  
Random Number Generator ◽  
Random Numbers ◽  
Number Generator

27.1 The RandomGen class, and the StdGen generator  23627.2 The Random class  23927.3 The global random number generator  240

scholarly journals A Random Number Generator Using Ring Oscillators and SHA-256 as Post-Processing

2015 ◽  
Vol 61 (2) ◽  
pp. 199-204 ◽  
Author(s):  
Szymon Łoza ◽  
Łukasz Matuszewski ◽  
Mieczysław Jessa
Keyword(s):  
Random Number ◽  
Statistical Tests ◽  
Random Number Generator ◽  
Random Numbers ◽  
Ring Oscillators ◽  
Number Generator ◽  
Post Processing ◽  
Field Programmable ◽  
Cryptographic System ◽  
Many Sources

Abstract Today, cryptographic security depends primarily on having strong keys and keeping them secret. The keys should be produced by a reliable and robust to external manipulations generators of random numbers. To hamper different attacks, the generators should be implemented in the same chip as a cryptographic system using random numbers. It forces a designer to create a random number generator purely digitally. Unfortunately, the obtained sequences are biased and do not pass many statistical tests. Therefore an output of the random number generator has to be subjected to a transformation called post-processing. In this paper the hash function SHA-256 as post-processing of bits produced by a combined random bit generator using jitter observed in ring oscillators (ROs) is proposed. All components – the random number generator and the SHA-256, are implemented in a single Field Programmable Gate Array (FPGA). We expect that the proposed solution, implemented in the same FPGA together with a cryptographic system, is more attack-resistant owing to many sources of randomness with significantly different nominal frequencies.

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