Low Temperature Wafer Direct Bonding Using Wet Chemical Treatment

2012 ◽  
Vol 482-484 ◽  
pp. 2381-2384
Author(s):  
Yan Li Zhao ◽  
Zi Jun Song ◽  
Yan Li ◽  
Hai Sheng San ◽  
Yu Xi Yu

In this paper, the low-temperature (less than or equal to 400 °C) silicon wafer direct bonding technology using wet chemical surface treatment is proposed. For bonded pairs of silicon-oxide-covered wafers, the optimum process condition is established with respect to the experimental results of two different wet chemical processing methods. The bonding quality is evaluated through infrared transmission test and tensile test. Experimental results indicate that the bonding strength of the additional 29% NH3•H2O treated samples is about 7.2 MPa, while it is no more than 3.1 MPa for the only piranha (H2SO4/H2O2) solution and RCA1 (NH3•H2O/H2O2/H2O) solution cleaned samples. Effect of the pulling speed on tensile test is also investigated. The results show that the pulling speed effect should be considered during the tensile test.

2017 ◽  
Vol 57 (2S1) ◽  
pp. 02BD02 ◽  
Author(s):  
Chenxi Wang ◽  
Jikai Xu ◽  
Xiaorun Zeng ◽  
Yanhong Tian ◽  
Chunqing Wang ◽  
...  

RSC Advances ◽  
2015 ◽  
Vol 5 (53) ◽  
pp. 42721-42727 ◽  
Author(s):  
Chengle Mai ◽  
Mingyu Li ◽  
Shihua Yang

A silica glass chip with a ∼200 μm rectangular channel was bonded through low temperature chemical surface activation direct bonding.


2011 ◽  
Vol 105-107 ◽  
pp. 1662-1665 ◽  
Author(s):  
Xin Yan ◽  
Yan Li Zhao ◽  
Hai Sheng San ◽  
Yu Xi Yu ◽  
Xu Yuan Chen

In this paper, silicon direct bonding was performed by two different cleaning processes, and the bonding quality was obtained by tensile test and IR test. For (100) P-type double side polished wafer, the optimum process condition was established with respect to the results of two different cleaning processes. The cleaning process of NH3•H2O/H2O2/H2O (Standard Cleaning 1, SC1) after the H2SO4/H2O2 (piranha solution) was found to be better suited for high bonding quality. The bonding strength of the SC1-cleaned samples is about 5.4 MPa with partially crack but no more than 0.7 MPa for the only piranha solution cleaned samples.


RSC Advances ◽  
2016 ◽  
Vol 6 (43) ◽  
pp. 37079-37084 ◽  
Author(s):  
Chengle Mai ◽  
Jiayuan Sun ◽  
Hongtao Chen ◽  
Cheng-Kang Mai ◽  
Mingyu Li

A p–n junction with excellent I–V characteristics was prepared through low-temperature chemical surface activation direct bonding without rigorous conditions.


2012 ◽  
Vol 206 (23) ◽  
pp. 4814-4821 ◽  
Author(s):  
H. Caquineau ◽  
L. Aiche ◽  
H. Vergnes ◽  
B. Despax ◽  
B. Caussat

1999 ◽  
Vol 85 (5) ◽  
pp. 2921-2928 ◽  
Author(s):  
Toshiko Mizokuro ◽  
Kenji Yoneda ◽  
Yoshihiro Todokoro ◽  
Hikaru Kobayashi

2011 ◽  
Vol 1287 ◽  
Author(s):  
Anupama Mallikarjunan ◽  
Laura M Matz ◽  
Andrew D Johnson ◽  
Raymond N Vrtis ◽  
Manchao Xiao ◽  
...  

ABSTRACTThe electrical and physical quality of gate and passivation dielectrics significantly impacts the device performance of thin film transistors (TFTs). The passivation dielectric also needs to act as a barrier to protect the TFT device. As low temperature TFT processing becomes a requirement for novel applications and plastic substrates, there is a need for materials innovation that enables high quality plasma enhanced chemical vapor deposition (PECVD) gate dielectric deposition. In this context, this paper discusses structure-property relationships and strategies for precursor development in silicon nitride, silicon oxycarbide (SiOC) and silicon oxide films. Experiments with passivation SiOC films demonstrate the benefit of a superior precursor (LkB-500) and standard process optimization to enable lower temperature depositions. For gate SiO2 deposition (that are used with polysilicon TFTs for example), organosilicon precursors containing different types and amounts of Si, C, O and H bonding were experimentally compared to the industry standard TEOS (tetraethoxysilane) at different process conditions and temperatures. Major differences were identified in film quality especially wet etch rate or WER (correlating to film density) and dielectric constant (k) values (correlating to moisture absorption). Gate quality SiO2 films can be deposited by choosing precursors that can minimize residual Si-OH groups and enable higher density stable moisture-free films. For e.g., the optimized precursor AP-LTO® 770 is clearly better than TEOS for low temperature PECVD depositions based on density, WER, k charge density (measured by flatband voltage or Vfb); and leakage and breakdown voltage (Vbd) measurements. The design and development of such novel precursors is a key factor to successfully enable manufacturing of advanced low temperature processed devices.


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