Electrical Properties of Metal-Oxide-Semiconductor (MOS) Structures on 4H-SiC(0001) Formed by Oxidizing Pre-Deposited SixNy

2007 ◽  
Vol 556-557 ◽  
pp. 647-650 ◽  
Author(s):  
Jeong Hyun Moon ◽  
Dong Hwan Kim ◽  
Ho Keun Song ◽  
Jeong Hyuk Yim ◽  
Wook Bahng ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Metal Oxide ◽  
Current Density ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Field ◽  
Mos Capacitors ◽  
Dielectric Layers ◽  
Capacitance Voltage ◽  
Mos Structures

We have fabricated advanced metal-oxide-semiconductor (MOS) capacitors with ultra thin (5 nm) remote-PECVD SixNy dielectric layers and investigated electrical properties of nitrided SiO2/4H-SiC interface after oxidizing the SixNy in dry oxygen at 1150 °C for 30, 60, 90 min. Improvements of electrical properties have been revealed in capacitance-voltage (C-V) and current density-electrical field (J-E) measurements in comparison with dry oxide. The improvements of SiC MOS capacitors formed by oxidizing the pre-deposited SixNy have been explained in this paper.

Electrical Properties of Atomic-Layer-Deposited La2O3/Thermal-Nitrided SiO2 Stacking Dielectric on 4H-SiC(0001)

2007 ◽  
Vol 556-557 ◽  
pp. 643-646 ◽  
Author(s):  
Jeong Hyun Moon ◽  
Kuan Yew Cheong ◽  
Da Il Eom ◽  
Ho Keun Song ◽  
Jeong Hyuk Yim ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Metal Oxide ◽  
Leakage Current ◽  
Leakage Current Density ◽  
Current Density ◽  
Atomic Layer ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Mos Capacitors

We have investigated the electrical properties of metal-oxide-semiconductor (MOS) capacitors with atomic-layer-deposited La2O3, thermal-nitrided SiO2, and atomic-layer-deposited La2O3/thermal-nitrided SiO2 on n-type 4H-SiC. A significant reduction in leakage current density has been observed in La2O3 structure when a 6-nm thick thermal nitrided SiO2 has been sandwiched between the La2O3 and SiC. However, this reduction is still considered high if compared to sample having thermal-nitrided SiO2 alone. The reasons for this have been explained in this paper.

Impact of Phosphorus Implantation on the Electrical Properties of SiO2/4H-SiC Interfaces Annealed in N2O

2016 ◽  
Vol 858 ◽  
pp. 701-704
Author(s):  
Patrick Fiorenza ◽  
Salvatore di Franco ◽  
Filippo Giannazzo ◽  
Simone Rascunà ◽  
Mario Saggio ◽  
...  
Keyword(s):  
High Temperature ◽  
High Resolution ◽  
Electrical Properties ◽  
Surface Region ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Activation ◽  
Mos Capacitors ◽  
Capacitance Voltage ◽  
Electrical Effect

In this work, the combined effect of a shallow phosphorus (P) pre-implantation and of a nitridation annealing in N2O on the properties of the SiO2/4H-SiC interface has been investigated. The peak carrier concentration and depth extension of the electrically active dopants introduced by the nitridation and by the combination of P pre-implantation and nitridation were determined by high resolution scanning capacitance microscopy (SCM). Macroscopic capacitance-voltage (C-V) measurements on metal oxide semiconductor (MOS) capacitors and nanoscale C-V analyses by SCM allowed to quantify the electrical effect of the donors introduced underneath the SiO2/4H-SiC interface. Phosphorous pre-implantation and subsequent high temperature electrical activation has been shown not only to produce an increased doping in the 4H-SiC surface region but also a better homogeneity of surface potential with respect to the use of N2O annealing only.

Electrical Properties of Thermally Grown SiO2-SiC Interfaces

1992 ◽  
Vol 242 ◽  
Author(s):  
Nitya N. Singh ◽  
A. Rys ◽  
A. U. Ahmed
Keyword(s):  
Electrical Properties ◽  
Metal Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Interface Trap ◽  
Mos Capacitors ◽  
Time Constants ◽  
Fixed Charges ◽  
Emission Time ◽  
Thermally Grown

ABSTRACTFabrication processes of metal-oxide semiconductor (MOS) capacitors on n-type, Si-face, 6H-SiC were studied. The effects of thermal oxidation conditions at temperatures between 1100 and 1250°C on the electrical properties of MOS capacitors were determined. The wafers were annealed under argon to improve the C-V characteristics. C-V characteristics of AI-SiO2-SiC metal-oxide-semiconductor were measured at high frequency in the dark and under illumination. In the dark inversion does not occur, probably owing to the absence of minority carriers due to the large band gap of 6H-SiC. The accumulation, depletion, and inversion regions were clearly observed when the C-V measurements were made under illumination for both wet and dry thermally grown oxides. The interface trap densities and emission time constants of fast states were determined by ac conductance measurements. From the analysis of data we obtained a total of Fixed charges and the slow interface traps, Nf + NssSlow of 1.5 to 3.3 × 1012 cm-2, fast interface trap densities, NssFast of 0.5 to 1.7 × 1011 cm-2 eV-1 and emission times constant of 0.3 to 1.4 μsec for wet oxidation. For dry oxidation, Nf + N, ssSlow of 3.5 to 11.2 × 10cm-2, NssFast of 0.7 to 1.25 × 1010 cm-2 eV-1 and emission time constants of 0.6 to 2 μsec were obtained.

scholarly journals Study of Interface Charge Densities for ZrO2and HfO2Based Metal-Oxide-Semiconductor Devices

2014 ◽  
Vol 2014 ◽  
pp. 1-6 ◽  
Author(s):  
N. P. Maity ◽  
Reshmi Maity ◽  
R. K. Thapa ◽  
S. Baishya
Keyword(s):  
Metal Oxide ◽  
Oxide Thickness ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Charge Densities ◽  
Interface Charge ◽  
Capacitance Voltage ◽  
P Type ◽  
Mos Structures ◽  
Good Agreement

A thickness-dependent interfacial distribution of oxide charges for thin metal oxide semiconductor (MOS) structures using high-kmaterials ZrO2and HfO2has been methodically investigated. The interface charge densities are analyzed using capacitance-voltage (C-V) method and also conductance (G-V) method. It indicates that, by reducing the effective oxide thickness (EOT), the interface charge densities (Dit) increases linearly. For the same EOT,Dithas been found for the materials to be of the order of 1012 cm−2 eV−1and it is originated to be in good agreement with published fabrication results at p-type doping level of1×1017 cm−3. Numerical calculations and solutions are performed by MATLAB and device simulation is done by ATLAS.

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