scholarly journals Study of Interface Charge Densities for ZrO2and HfO2Based Metal-Oxide-Semiconductor Devices

2014 ◽  
Vol 2014 ◽  
pp. 1-6 ◽  
Author(s):  
N. P. Maity ◽  
Reshmi Maity ◽  
R. K. Thapa ◽  
S. Baishya
Keyword(s):  
Metal Oxide ◽  
Oxide Thickness ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Charge Densities ◽  
Interface Charge ◽  
Capacitance Voltage ◽  
P Type ◽  
Mos Structures ◽  
Good Agreement

A thickness-dependent interfacial distribution of oxide charges for thin metal oxide semiconductor (MOS) structures using high-kmaterials ZrO2and HfO2has been methodically investigated. The interface charge densities are analyzed using capacitance-voltage (C-V) method and also conductance (G-V) method. It indicates that, by reducing the effective oxide thickness (EOT), the interface charge densities (Dit) increases linearly. For the same EOT,Dithas been found for the materials to be of the order of 1012 cm−2 eV−1and it is originated to be in good agreement with published fabrication results at p-type doping level of1×1017 cm−3. Numerical calculations and solutions are performed by MATLAB and device simulation is done by ATLAS.

Analysis of Interface Charge Densities for High-k Dielectric Materials based Metal Oxide Semiconductor Devices

2016 ◽  
Vol 15 (05n06) ◽  
pp. 1660011 ◽  
Author(s):  
N. P. Maity ◽  
R. R. Thakur ◽  
Reshmi Maity ◽  
R. K. Thapa ◽  
S. Baishya
Keyword(s):  
Metal Oxide ◽  
Oxide Thickness ◽  
Dielectric Materials ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Charge Densities ◽  
Interface Charge ◽  
High K ◽  
Conductance Method ◽  
High K Dielectric

In this paper, the interface charge densities ([Formula: see text]) are studied and analyzed for ultra thin dielectric metal oxide semiconductor (MOS) devices using different high-k dielectric materials such as Al2O3, ZrO2 and HfO2. The [Formula: see text] have been calculated by a new approach using conductance method and it indicates that by reducing the thickness of the oxide, the [Formula: see text] increases and similar increase is also found by replacing SiO2 with high-k. For the same oxide thickness, SiO2 has the lowest [Formula: see text] and found to be the order of 10[Formula: see text][Formula: see text]cm[Formula: see text][Formula: see text]eV[Formula: see text]. Linear increase in [Formula: see text] has been observed as the dielectric constant of the oxide increases. The [Formula: see text] is found to be in good agreement with published fabrication results at p-type doping level of [Formula: see text][Formula: see text]cm[Formula: see text]. Numerical calculations and solutions are performed by MATLAB and device simulation is done by ATLAS.

Hole Trapping in the NBTI Characteristic of SiC MOSFETs

2018 ◽  
Vol 924 ◽  
pp. 667-670
Author(s):  
Yan Jing He ◽  
Hong Liang Lv ◽  
Xiao Yan Tang ◽  
Qing Wen Song ◽  
Yi Meng Zhang ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Field Effect Transistors ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Threshold Voltage Shift ◽  
Hole Trapping ◽  
Primary Mechanism ◽  
Capacitance Voltage ◽  
Cv Measurements ◽  
P Type

P-type implanted metal oxide semiconductor capacitors (MOSCAPs) and metal oxide semiconductor field effect transistors (MOSFETs) have been fabricated. The characteristics of hole trapping at the interface of SiO2/SiC are investigated through capacitance-voltage (CV) measurements with different starting voltages. The negative shift voltage ∆Vshift and the hysteresis voltages ∆VH which caused by the hole traps in the MOSCAPs and MOSFETs are extracted from CV results. The results show that the hole traps extracted from MOSCAPs are larger than the that extracted from the threshold voltage shift in the MOSFETs. It suggests holes trapping are the primary mechanism contributing to the NBTI, but not all the holes work. Part of the hole traps are compensation by sufficient electrons in the MOSFET structure.

Electrical Properties of Metal-Oxide-Semiconductor (MOS) Structures on 4H-SiC(0001) Formed by Oxidizing Pre-Deposited SixNy

2007 ◽  
Vol 556-557 ◽  
pp. 647-650 ◽  
Author(s):  
Jeong Hyun Moon ◽  
Dong Hwan Kim ◽  
Ho Keun Song ◽  
Jeong Hyuk Yim ◽  
Wook Bahng ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Metal Oxide ◽  
Current Density ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Electrical Field ◽  
Mos Capacitors ◽  
Dielectric Layers ◽  
Capacitance Voltage ◽  
Mos Structures

We have fabricated advanced metal-oxide-semiconductor (MOS) capacitors with ultra thin (5 nm) remote-PECVD SixNy dielectric layers and investigated electrical properties of nitrided SiO2/4H-SiC interface after oxidizing the SixNy in dry oxygen at 1150 °C for 30, 60, 90 min. Improvements of electrical properties have been revealed in capacitance-voltage (C-V) and current density-electrical field (J-E) measurements in comparison with dry oxide. The improvements of SiC MOS capacitors formed by oxidizing the pre-deposited SixNy have been explained in this paper.

Visible Light Sensor Based on Metal-Oxide-Semiconductor Structure

2014 ◽  
Vol 605 ◽  
pp. 384-387
Author(s):  
Nicola Nedev ◽  
Abraham Arias ◽  
Mario Curiel ◽  
Roumen Nedev ◽  
David Mateos ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Output Signal ◽  
Uv Light ◽  
Low Cost ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Light Illumination ◽  
Capacitance Voltage ◽  
P Type ◽  
Metal Oxide Semiconductor Structure

We present results for the effect of visible and UV light on the capacitance-voltage characteristics of a p-type Si based Metal-Oxide-Semiconductor ring-dot structure. It is shown that the structure can be used as a low cost sensor that is simple and easy to manufacture. The sensor can be used to measure visible and UV light intensity or as a light switch. The output signal is change of the inversion capacitance under light illumination at a given bias. The device power consumption is very low and the output signal is independent of the temperature.

scholarly journals Comparative Study ofSiO2,Al2O3, and BeO Ultrathin Interfacial Barrier Layers in Si Metal-Oxide-Semiconductor Devices

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
J. H. Yum ◽  
J. Oh ◽  
Todd. W. Hudnall ◽  
C. W. Bielawski ◽  
G. Bersuker ◽  
...  
Keyword(s):  
Metal Oxide ◽  
High Performance ◽  
Field Effect Transistors ◽  
Beryllium Oxide ◽  
Atomic Layer ◽  
Oxide Thickness ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Flat Band ◽  
Effective Electron

In a previous study, we have demonstrated that beryllium oxide (BeO) film grown by atomic layer deposition (ALD) on Si and III-V MOS devices has excellent electrical and physical characteristics. In this paper, we compare the electrical characteristics of inserting an ultrathin interfacial barrier layer such as SiO2, Al2O3, or BeO between the HfO2gate dielectric and Si substrate in metal oxide semiconductor capacitors (MOSCAPs) and n-channel inversion type metal oxide semiconductor field effect transistors (MOSFETs). Si MOSCAPs and MOSFETs with a BeO/HfO2gate stack exhibited high performance and reliability characteristics, including a 34% improvement in drive current, slightly better reduction in subthreshold swing, 42% increase in effective electron mobility at an electric field of 1 MV/cm, slightly low equivalent oxide thickness, less stress-induced flat-band voltage shift, less stress induced leakage current, and less interface charge.

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