Properties of SiO2/4H-SiC Interfaces with an Oxide Deposited by a High-Temperature Process
2017 ◽
Vol 897
◽
pp. 331-334
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Keyword(s):
This work reports on the physical and electrical characterization of the oxide/semiconductor interface in MOS capacitors with the SiO2 layer deposited by a high temperature process from dichlorosilane and nitrogen-based vapor precursors and subjected to a post deposition annealing process in N2O. Low interface state density (Dit ≈ 9.0×1011cm-2eV-1) was found at 0.2 eV from EC, which is comparable to the values typically obtained in other lower temperature deposited oxides (e.g., TEOS). A barrier height of 2.8 eV was derived from the Fowler-Nordheim plot, very close to the ideal value expected for SiO2/4H-SiC interface. Basing on these preliminary results, the integration in MOSFETs devices can be envisaged.
2014 ◽
Vol 778-780
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pp. 541-544
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2013 ◽
Vol 740-742
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pp. 695-698
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Keyword(s):
2020 ◽
Vol 2020
◽
pp. 1-9
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2010 ◽
Vol 645-648
◽
pp. 495-498
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2016 ◽
Vol 2
(3)
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pp. 7
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Keyword(s):