Effect of Post-Deposition Solution Treatment and Ageing on Improving Interfacial Adhesion Strength of Cold Sprayed Ti6Al4V Coatings

This study aims at investigating the effect of post-deposition solution treatment and ageing (STA) on improving the interfacial adhesion strength in cold spray (CS) Ti6Al4V coatings deposited on Ti6Al4V substrates, measured by the adhesive-free collar-pin pull-off (CPP) test. Solution treatment was performed at 940 °C for 1 h and ageing was carried out at 480 °C for 8 h. Investigations were carried out for specimens with three different pre-treatments of the substrate surface, namely grit-blasted, as-machined (faced on lathe machine), and ground. Additionally, the effect of post-deposition STA was studied in terms of phase analysis, microstructure, and porosity level. It was observed that STA led to complete interfacial mixing resulting in significantly improved adhesion strength (by more than 520%) with the maximum measured value of greater than 766 MPa for ground substrates, reaching 81% of the ultimate tensile strength of mill annealed Ti6Al4V.

Analysis of the combined effect of long-term heat light soaking and KF/NaF post-deposition treatment on the open-circuit voltage loss in CIGS solar cells

Heat light soaking (HLS) has been known to impact the photovoltaic parameters of Cu(In,Ga)Se2 (CIGS) solar cells for a long time. Recently, the focus shifted to the effect of the procedure on alkali fluoride-treated CIGS. Here, we investigate the impact of long-term HLS on the open-circuit (VOC) loss in high-efficiency CIGS with potassium fluoride (KF) and sodium fluoride (NaF) post-deposition treatment (PDT). HLS is shown to increase the net doping density, however, the subsequent improvement of the VOC is lower than expected. Using an analysis based on the SQ theory, we show that HLS reduces the nonradiative recombination rate in the bulk but increases the one at the interface. We present a model to explain the increase of interface recombination. We further demonstrate that a combination of HLS and KF/NaF-PDT is necessary to enhance the positive impacts of HLS and mitigate the detrimental ones leading to high-efficiency CIGS devices (22%).

Influence of Thermal Post-deposition on Trap States in Sol-gel Indium Zinc Oxide TFTs

In solution-processed oxide thin-film transistors, post-deposition thermal processing significantly changes the film’s transport properties and is essential for high-performance devices. The mobility, bias stability and trapping-detrapping related hysteresis are improved with higher processing temperatures, which is generally attributed to decreased concentrations of localized states that act as electron traps. Fabricating and characterizing 29 devices, we provide further experimental evidence that post-deposition processing indeed leads to enhanced channel electron mobility in sol-gel indium zinc oxide TFTs, and, on the basis of a simple model, we extract physical parameters that yield a quantitative assessment of the changes in the densities and the properties of the localized trap states. The data is obtained for sol-gel indium zinc oxide thin films and TFTs subjected to thermal postdeposition processing from 300 to 500 0<\sup>C. The extracted parameters indicate that the trap state density in the bulk semiconductor and at the interface decrease by factors of 5 and 3, respectively. Furthermore, the localized states become shallower, and the band mobility increases with higher processing temperatures. <br>

High-performance normally-off recessed Tri-Gate GaN MIS-FETs in micrometer scale

In this study, a normally-off AlGaN/GaN MIS-FET based on the combination of tri-gate and recessed MIS gate is fabricated and characterized. The recessed tri-gate MIS-FET is manufactured by micro-level trenches, defining the fin-shaped channel and improving the gate control capability. The recessed surface is cleaned by a diluted BOE, HCl solution, and TMAH treatment before a 20-nm Al2O3 deposition by ALD. After deposition, post-deposition annealing was carried out. Recessed tri-gate MIS-FET demonstrates a high threshold voltage of 3.1 V, a high drain current of 1121 mA/mm, and an on/off current ratio of 2×108. A smaller on-resistance of 5.4 Ω·mm compared with recessed planar MIS-FET of 12.7 Ω·mm is achieved. Besides, the devices show a low I-V hysteresis. All experimental results confirm micro-level trenches realize the advantages of the recessed tri-gate structures, which supports a promising technique to pursue the normally-off operation of GaN HEMTs.