EMC of Semiconductor Packages. RF Noise Immunity for Semiconductor Devices.

Electromagnetic interference (EMI) is an unwanted disturbance caused by external sources that would affect the electrical functionality of the device. This paper presents an advanced approach of electromagnetic interference (EMI) shielding protection for sensitive and critical semiconductor packages. The process employed half-cutting method to apply the EMI coating on the upper-half portion of the device, protecting the Silicon die and internal components from external EMI disturbance. Eventually, the enhanced EMI shielding process would provide advantages of improved quality and eliminate risks of possible assembly issues while providing the main purpose of EMI protection for semiconductor devices. For future studies, the technique could be applied on packages with similar requirement. Prototypes are helpful to validate the effectiveness of the enhanced process.

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Design of Epoxy Encapsulating Compounds for Highly Reliable Surface Mounting Semiconductor Devices

MRS Proceedings ◽

10.1557/proc-390-71 ◽

1995 ◽

Vol 390 ◽

Cited By ~ 4

Author(s):

Toshiaki Ishii ◽

R. Moteki ◽

A. Nagai ◽

S. Eguchi ◽

M. Ogata

Keyword(s):

Thermal Stress ◽

Moisture Absorption ◽

Semiconductor Devices ◽

Filler Loading ◽

Temperature Cycling ◽

Soldering Temperature ◽

Molding Compounds ◽

High Adhesion ◽

Semiconductor Packages ◽

Surface Mounting

ABSTRACTOne of the most important subjects for semiconductor packages is preventing cracks which occur when the entire package is exposed to a soldering temperature of 215 to 260°C in the surface mounting technology. Cracking, as seen during temperature cycling tests is also a problem to be addressed. This paper reports the design of epoxy encapsulating compounds for highly reliable semiconductor devices which require the following properties: (1) toughness of matrix resin, (2) low moisture absorption, (3) high adhesion to insertions, and (4) reduction of thermal stress. The moisture absorption was lowered and the toughness was improved by using hydrophobic epoxy resins and high filler loading. The latter reduced the thermal stress, and it was effective for lowering the moisture absorption and increasing the fracture toughness of molding compounds. The reliability tests results were also considered in terms of physical properties of molding compounds.

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Formation of defects in implanted hipox-structures

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100131668 ◽

1992 ◽

Vol 50 (2) ◽

pp. 1406-1407

Author(s):

Peter Pegler ◽

N. David Theodore ◽

Ming Pan

Keyword(s):

High Pressure ◽

Cross Section ◽

Semiconductor Devices ◽

Silicon Substrates ◽

Processing Conditions ◽

Pressure Oxidation ◽

Deep Trench ◽

Local Oxidation ◽

Trench Isolation ◽

And Behavior

High-pressure oxidation of silicon (HIPOX) is one of various techniques used for electrical-isolation of semiconductor-devices on silicon substrates. Other techniques have included local-oxidation of silicon (LOCOS), poly-buffered LOCOS, deep-trench isolation and separation of silicon by implanted oxygen (SIMOX). Reliable use of HIPOX for device-isolation requires an understanding of the behavior of the materials and structures being used and their interactions under different processing conditions. The effect of HIPOX-related stresses in the structures is of interest because structuraldefects, if formed, could electrically degrade devices.This investigation was performed to study the origin and behavior of defects in recessed HIPOX (RHIPOX) structures. The structures were exposed to a boron implant. Samples consisted of (i) RHlPOX'ed strip exposed to a boron implant, (ii) recessed strip prior to HIPOX, but exposed to a boron implant, (iii) test-pad prior to HIPOX, (iv) HIPOX'ed region away from R-HIPOX edge. Cross-section TEM specimens were prepared in the <110> substrate-geometry.

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Comparison of ultra high resolution immersion lens CFESEM and TEM for imaging of semiconductor devices

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100176241 ◽

1990 ◽

Vol 48 (4) ◽

pp. 622-623

Author(s):

Terrence Reilly ◽

Al Pelillo ◽

Barbara Miner

Keyword(s):

High Resolution ◽

Sample Preparation ◽

Cross Sections ◽

Semiconductor Devices ◽

Ion Milling ◽

Observation Area ◽

Transmission Electron ◽

Milling Machines ◽

Resolution Imaging ◽

Electron Microscopes

The use of transmission electron microscopes (TEM) has proven to be very valuable in the observation of semiconductor devices. The need for high resolution imaging becomes more important as the devices become smaller and more complex. However, the sample preparation for TEM observation of semiconductor devices have generally proven to be complex and time consuming. The use of ion milling machines usually require a certain degree of expertise and allow a very limited viewing area. Recently, the use of an ultra high resolution "immersion lens" cold cathode field emission scanning electron microscope (CFESEM) has proven to be very useful in the observation of semiconductor devices. Particularly at low accelerating voltages where compositional contrast is increased. The Hitachi S-900 has provided comparable resolution to a 300kV TEM on semiconductor cross sections. Using the CFESEM to supplement work currently being done with high voltage TEMs provides many advantages: sample preparation time is greatly reduced and the observation area has also been increased to 7mm. The larger viewing area provides the operator a much greater area to search for a particular feature of interest. More samples can be imaged on the CFESEM, leaving the TEM for analyses requiring diffraction work and/or detecting the nature of the crystallinity.

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