Formation of defects in implanted hipox-structures

1992 ◽  
Vol 50 (2) ◽  
pp. 1406-1407
Author(s):  
Peter Pegler ◽  
N. David Theodore ◽  
Ming Pan
Keyword(s):  
High Pressure ◽  
Cross Section ◽  
Semiconductor Devices ◽  
Silicon Substrates ◽  
Processing Conditions ◽  
Pressure Oxidation ◽  
Deep Trench ◽  
Local Oxidation ◽  
Trench Isolation ◽  
And Behavior

High-pressure oxidation of silicon (HIPOX) is one of various techniques used for electrical-isolation of semiconductor-devices on silicon substrates. Other techniques have included local-oxidation of silicon (LOCOS), poly-buffered LOCOS, deep-trench isolation and separation of silicon by implanted oxygen (SIMOX). Reliable use of HIPOX for device-isolation requires an understanding of the behavior of the materials and structures being used and their interactions under different processing conditions. The effect of HIPOX-related stresses in the structures is of interest because structuraldefects, if formed, could electrically degrade devices.This investigation was performed to study the origin and behavior of defects in recessed HIPOX (RHIPOX) structures. The structures were exposed to a boron implant. Samples consisted of (i) RHlPOX'ed strip exposed to a boron implant, (ii) recessed strip prior to HIPOX, but exposed to a boron implant, (iii) test-pad prior to HIPOX, (iv) HIPOX'ed region away from R-HIPOX edge. Cross-section TEM specimens were prepared in the <110> substrate-geometry.

Microstructure and Defects in Implanted Hipox-Structures

1992 ◽  
Vol 280 ◽  
Author(s):  
N. David Theodore ◽  
Peter L. Pegler
Keyword(s):  
High Pressure ◽  
Semiconductor Devices ◽  
Structural Defects ◽  
Silicon Substrates ◽  
Pressure Oxidation ◽  
Electrical Isolation ◽  
And Behavior ◽  
Dislocation Sources ◽  
Induced Dislocation ◽  
High Pressure Oxidation

ABSTRACTHigh-pressure oxidation of silicon (HIPOX) is one of various techniques used for electrical-isolation of semiconductor-devices on silicon substrates. The effect of HIPOX-related stresses on isolation structures is of interest because structural-defects, if formed, could electrically degrade devices. The present investigation was performed to study the origin and behavior of defects in recessed HIPOX structures. The structures were exposed to a boron implant. The experimental observations indicate that glide dislocations arise when the following features are present: (i) HIPOX, (ii) recessed edge, (iii) boron implant. The origin and behavior of the defects are modelled and explained in terms of implant-induced dislocation-sources creating glide-dislocations in the structures. The microstructure of the structures described above, and defect-modelling is presented.

Defect-Characterization in Implanted Locos + Trench-Isolated Structures

1991 ◽  
Vol 239 ◽  
Author(s):  
N. David Theodore ◽  
Barbara Vasquez ◽  
Peter Fejes
Keyword(s):  
Integrated Circuits ◽  
Cross Section ◽  
High Dose ◽  
Defect Characterization ◽  
Dislocation Loops ◽  
Etch Pits ◽  
Local Oxidation ◽  
Silicon Integrated Circuits ◽  
Trench Isolation ◽  
Dislocation Sources

ABSTRACTAs device dimensions decrease in silicon integrated-circuits, conventional LOCOS (local-oxidation of silicon) isolation becomes inadequate to meet dimensional demands. Variations on LOCOS are therefore being explored for further miniaturization of devices. One such variation involves poly-buffered LOCOS + trench-isolation (PBLT). In this study, PBLT structures were characterized using TEM. Wright-etched cross-section SEM micrographs showed etch-pits associated with a combination of high-dose (> 5E14 cm-2) phosphorous implants and PBLT isolation. TEM characterization showed that dislocations were formed in the structures for a combination of high-dose (1E15 cm-2) phosphorous implants (followed by an anneal) and PBLT isolation. Structures exposed to lower-dose (1E14 cm-2) implants showed no defects and neither did 1E15 implanted structures prior to annealing. The results are modelled in terms of the stress configurations present in the structures, and in terms of dislocation-sources resulting from implantation-related dislocation-loops. The dislocation-sources operate in the presence of stresses associated with the isolation-trenches. Glide-loops form, which then grow in response to stresses in the structures and dislocations result on glide planes.

Stress-Related Defects in Implanted Locos + Trench - Isolated Structures

1992 ◽  
Vol 262 ◽  
Author(s):  
Barbara Vasquez ◽  
N. David Theodore
Keyword(s):  
Stress Fields ◽  
High Dose ◽  
Extended Defects ◽  
Dislocation Loops ◽  
Defect Engineering ◽  
Local Oxidation ◽  
Trench Isolation ◽  
And Behavior ◽  
Dislocation Sources ◽  
Reducing Stress

ABSTRACTPoly-buffered local-oxidation of silicon + trench-isolation (PBLT) is a technique being explored for device isolation. In an earlier study, we had reported the presence of dislocations associated with a combination of high-dose (∼5E14 cm2) phosphorous implants and PBLT isolation. In the present study, the behavior of extended defects present in the structures is analyzed in greater detail. The origin and behavior of the defects is modelled to explore potential mechanisms to explain the observations. Implantation induced dislocation-loops interact with stress fields associated with PBLT isolation-trenches. Some of the implant loops (in the presence of a stress field) transform to dislocation sources which then create glide dislocations in the structures. Strategies for defect engineering are discussed, including reducing implant-induced damage (lowering the implant dose) or reducing stress fields (by moving the edge of the implanted region away from the trench). Defect densities can be reduced or eliminated.

Microstructural characterization of implanted LOCOS + trench-isolated structures

1991 ◽  
Vol 49 ◽  
pp. 888-889
Author(s):  
N. David Theodore ◽  
Barbara Vasquez ◽  
Peter Fejes
Keyword(s):  
Active Regions ◽  
Microstructural Characterization ◽  
Extended Defects ◽  
Active Device ◽  
Deep Trench ◽  
Device Scaling ◽  
Local Oxidation ◽  
Trench Isolation ◽  
Field Oxide

As device dimensions decrease and circuit densities increase, conventional LOCOS (Local-Oxidation of Silicon) isolation presents a limitation due to lateral encroachment of the isolation-oxide. Variations in LOCOS, including poly-buffered LOCOS have been of interest as means to limit lateral encroachment of the field-oxide into the active device-region. Deep-trench isolation provides a means to support device scaling and in this work is integrated with poly-buffered LOCOS to create self-aligned shallow fieldoxide elements with minimal encroachment into active regions. Use of these technologies however requires an understanding of the behavior of the materials and structures being used and their interactions under different processing conditions. The effect of fabrication-related stresses in the structures is of interest because extended-defects, if formed, could electrically degrade devices.

Reduced narrow-width effects in a scaled local oxidation of silicon process

1985 ◽  
Vol 63 (6) ◽  
pp. 894-896
Author(s):  
David A. Baglee ◽  
M. P. Duane ◽  
M. C. Smayling
Keyword(s):  
High Pressure ◽  
Transistor Channel ◽  
Process Flow ◽  
Pressure Oxidation ◽  
Oxidation Step ◽  
Local Oxidation ◽  
Narrow Width ◽  
High Pressure Oxidation

The reduction of narrow-width effects in VLSI transistors is of great importance if small-geometry devices are to be of real use in advanced circuits. These effects are caused by boron encroaching into the transistor channel from underneath the field isolation oxide. In this paper we describe the results of experiments to reduce this encroachment by the use of high-pressure oxidation. We show that the substitution of this process into a VLSI process flow, for the field oxidation step, allows the channel-stop implant dose to be significantly reduced (50%) without degradation of interdevice isolation.

scholarly journals Binary Self-Assembly of Nanocolloidal Arrays using Concurrent and Sequential Spin Coating Techniques

Materials ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 274
Author(s):  
Shih-Jyun Shen ◽  
Demei Lee ◽  
Yu-Chen Wu ◽  
Shih-Jung Liu
Keyword(s):  
Silicon Substrate ◽  
Self Assembly ◽  
Spin Coating ◽  
Processing Parameters ◽  
The Self ◽  
Silicon Substrates ◽  
Processing Conditions ◽  
Polystyrene Spheres ◽  
Optimal Processing ◽  
Spin Coater

This paper reports the binary colloid assembly of nanospheres using spin coating techniques. Polystyrene spheres with sizes of 900 and 100 nm were assembled on top of silicon substrates utilizing a spin coater. Two different spin coating processes, namely concurrent and sequential coatings, were employed. For the concurrent spin coating, 900 and 100 nm colloidal nanospheres of latex were first mixed and then simultaneously spin coated onto the silicon substrate. On the other hand, the sequential coating process first created a monolayer of a 900 nm nanosphere array on the silicon substrate, followed by the spin coating of another layer of a 100 nm colloidal array on top of the 900 nm array. The influence of the processing parameters, including the type of surfactant, spin speed, and spin time, on the self-assembly of the binary colloidal array were explored. The empirical outcomes show that by employing the optimal processing conditions, binary colloidal arrays can be achieved by both the concurrent and sequential spin coating processes.

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