Constraint Propagation for Analog and Mixed-Signal Integrated Circuit Design

2020 ◽  
Author(s):  
Krinke Andreas
Keyword(s):  
Integrated Circuits ◽  
Design Process ◽  
Integrated Circuit ◽  
Constraint Propagation ◽  
Digital Integrated Circuits ◽  
Ic Design ◽  
Integrated Circuit Design ◽  
Mixed Signal ◽  
Actual Design ◽  
Manual Tasks

While the design of digital integrated circuits (ICs) is largely automated, the design of analog/ mixed-signal (AMS) ICs is still dominated by manual tasks. One of the biggest obstacles to further automation is the large number of constraints that have to be taken into account during AMS IC design. They are derived both from the specifcation and during the actual design process and must be fulflled before production of the IC can begin. The aim of this work is to present our fndings regarding the formalization of constraints and their propagation within the design hierarchy in order to make them visible and verifable in all relevant cells. Constraints are integrated into the AMS IC design process so that they can be considered at all stages of the design. Our research enables the integration and consideration of constraints in all types of design tools—not only for AMS IC design, but after generalization for any design process. Contents Abbreviations VIII Selected Symbols X ...

scholarly journals Achieving Energy Efficiency in Analogue and Mixed Signal Integrated Circuit Design

10.5772/38356 ◽  
2012 ◽  
Author(s):  
E. Lpez-Morillo ◽  
F. Mrquez ◽  
T. Snchez-Rodrguez ◽  
C.I. Lujn-Martnez ◽  
F. Munoz
Keyword(s):  
Energy Efficiency ◽  
Circuit Design ◽  
Integrated Circuit ◽  
Integrated Circuit Design ◽  
Mixed Signal

Teaching Mixed-Signal Integrated Circuit Design to Undergraduates

2006 ◽  
Vol 49 (1) ◽  
pp. 39-48 ◽  
Author(s):  
T.A. Hudson ◽  
E.R. Doering ◽  
G. Lee-Thomas
Keyword(s):  
Circuit Design ◽  
Integrated Circuit ◽  
Integrated Circuit Design ◽  
Mixed Signal

DoD Design Cloud Analysis: Securing the Integrated Circuit Design Process

2012 ◽  
Author(s):  
Mario N. Gomez
Keyword(s):  
At Risk ◽  
Design Process ◽  
Circuit Design ◽  
Department Of Defense ◽  
Integrated Circuit ◽  
Secure Communication ◽  
Integrated Circuit Design ◽  
Defense Systems ◽  
Design Software ◽  
Security Costs

The use of unsecure foundries has allowed and is still providing a pathway for counterfeit microelectronics into U.S. defense systems. As a result, the Warfighter has been put at risk and a solution is needed. To counter this dilemma, this study looks into the feasibility of creating a Department of Defense (DoD) - wide design cloud that would provide circuit designers with a more secure and economical way of designing and fabricating circuits. The design cloud would include secure communication to trusted foundries along with needed circuit design software. Factors such as security, costs, benefits, and issues are taken into consideration in determining whether the use of the cloud would actually aid the integrated circuit design process.

INTEGRATED CIRCUIT DESIGN RESEARCH RANKING FOR WORLDWIDE UNIVERSITIES

2008 ◽  
Vol 17 (01) ◽  
pp. 141-167 ◽  
Author(s):  
KIAT-SENG YEO ◽  
ZHI-HUI KONG ◽  
NUKALA NISHANT ◽  
HAITAO FU ◽  
WEI ZENG
Keyword(s):  
Integrated Circuits ◽  
Video Game ◽  
Integrated Circuit ◽  
Design Research ◽  
Research Performance ◽  
Ic Design ◽  
Skilled Manpower ◽  
Knowledge Intensive ◽  
Number Of Publications ◽  
Video Game Consoles

The proliferation of integrated circuits (ICs) in the present technological era has brought forth revolutionary digital modernization that has ultimately transformed the history and lifestyle of humankind. ICs have become the heart of practically all state-of-the-art electronic devices such as computers, cell phones, video game consoles, and cameras. This ever-flourishing IC design industry is knowledge-intensive, which in turn translates into a huge appetite for technically precocious talents. Hence, in an effort to fuel and further foster the industry with more highly skilled manpower and at the same time to vie for a share of the burgeoning industry, higher educational institutions and universities from all around the globe are placing greater than ever emphasis on IC design research. Most importantly, strenuous efforts in a holistic manner are being made by each university in order to elicit outstanding and top-notch research in IC design. The authors have conducted a detailed and extensive survey to rank the various universities of the world in the field of IC design based on their research performance. In fact, assessments in the form of ranking have gained prominence over the recent years captivating the attention of a large number of students and universities. It helps the students in knowing how each university is progressing in a particular field and in turn helps the universities in analyzing their positions globally to remain competitive. Three ranking indicators, namely the Number of Publications, Citation Counts, and Cites per Paper have been chosen. The methodology used in ranking is also reported. The universities occupying the top echelons in IC design research are identified and a proven three-pronged approach for eliciting outstanding research performance is discussed.

scholarly journals Digital integrated circuit design : "ASIC implementation of an adaptive digital predistorter for lasers on ROF

2021 ◽  
Author(s):  
Charles Lim
Keyword(s):  
Integrated Circuit ◽  
Design Flow ◽  
Ic Design ◽  
Integrated Circuit Design ◽  
Design Synthesis ◽  
Radio Signals ◽  
Hardware Description ◽  
Communications Services ◽  
Digital Predistorter ◽  
Proper Operation

Radio over fiber has become one of the most useful technologies for providing extended coverage of wireless communications services. ROF uses analog fiber optic links to distribute wireless radio signals from a central location to multiple remote locations where the added desired antennas are placed for stronger signal coverage. The adaptive predistortion technique of a LASER ROF chip is implemented using the digital IC design flow. The design flow can be separated into two main parts, namely the RTL design / synthesis and the generation of the actual chip. The first part in the design flow consists of generating the proper logical functionality of the IC using a hardware description language (HDL), namely VHDL or Verilog, and synthesizing the code to ensure proper operation. The second part in the design flow consists of floorplanning and physical layout of the ASIC.

A TOTAL-DOSE HARDENING-BY-DESIGN APPROACH FOR HIGH-SPEED MIXED-SIGNAL CMOS INTEGRATED CIRCUITS

2004 ◽  
Vol 14 (02) ◽  
pp. 367-378 ◽  
Author(s):  
NATHAN NOWLIN ◽  
JOHN BAILEY ◽  
BOB TURFLER ◽  
DAVE ALEXANDER
Keyword(s):  
Integrated Circuits ◽  
Total Dose ◽  
Integrated Circuit ◽  
High Speed ◽  
Mixed Signal ◽  
Cmos Integrated Circuit ◽  
Ieee 1394 ◽  
Interface Chip ◽  
Signal Interface ◽  
Radiation Tolerant

This paper describes design choices and tradeoffs made when designing total-dose hardness into an advanced CMOS integrated circuit. Closed geometry transistors are described and compared, emphasizing their radiation tolerant performance. Speed and area tradeoffs incurred in circuit design when using such closed geometry transistors are illustrated in the design of an advanced IEEE 1394 cable physical layer mixed-signal interface chip.

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