scholarly journals Digital integrated circuit design : "ASIC implementation of an adaptive digital predistorter for lasers on ROF

2021 ◽  
Author(s):  
Charles Lim
Keyword(s):  
Integrated Circuit ◽  
Design Flow ◽  
Ic Design ◽  
Integrated Circuit Design ◽  
Design Synthesis ◽  
Radio Signals ◽  
Hardware Description ◽  
Communications Services ◽  
Digital Predistorter ◽  
Proper Operation

Radio over fiber has become one of the most useful technologies for providing extended coverage of wireless communications services. ROF uses analog fiber optic links to distribute wireless radio signals from a central location to multiple remote locations where the added desired antennas are placed for stronger signal coverage. The adaptive predistortion technique of a LASER ROF chip is implemented using the digital IC design flow. The design flow can be separated into two main parts, namely the RTL design / synthesis and the generation of the actual chip. The first part in the design flow consists of generating the proper logical functionality of the IC using a hardware description language (HDL), namely VHDL or Verilog, and synthesizing the code to ensure proper operation. The second part in the design flow consists of floorplanning and physical layout of the ASIC.

scholarly journals Digital integrated circuit design : "ASIC implementation of an adaptive digital predistorter for lasers on ROF

2021 ◽  
Author(s):  
Charles Lim
Keyword(s):  
Integrated Circuit ◽  
Design Flow ◽  
Ic Design ◽  
Integrated Circuit Design ◽  
Design Synthesis ◽  
Radio Signals ◽  
Hardware Description ◽  
Communications Services ◽  
Digital Predistorter ◽  
Proper Operation

Radio over fiber has become one of the most useful technologies for providing extended coverage of wireless communications services. ROF uses analog fiber optic links to distribute wireless radio signals from a central location to multiple remote locations where the added desired antennas are placed for stronger signal coverage. The adaptive predistortion technique of a LASER ROF chip is implemented using the digital IC design flow. The design flow can be separated into two main parts, namely the RTL design / synthesis and the generation of the actual chip. The first part in the design flow consists of generating the proper logical functionality of the IC using a hardware description language (HDL), namely VHDL or Verilog, and synthesizing the code to ensure proper operation. The second part in the design flow consists of floorplanning and physical layout of the ASIC.

scholarly journals A Novel Automated Design Methodology for Power Electronics Converters

Electronics ◽  
2021 ◽  
Vol 10 (3) ◽  
pp. 271
Author(s):  
André Andreta ◽  
Luiz Fernando Lavado Villa ◽  
Yves Lembeye ◽  
Jean Christophe Crebier
Keyword(s):  
Power Electronics ◽  
Integrated Circuit ◽  
Building Blocks ◽  
Power Converter ◽  
Computational Effort ◽  
Design Flow ◽  
Integrated Circuit Design ◽  
In Series ◽  
Amount Of Knowledge ◽  
Conversion Stage

This work proposes a methodology for designing power electronic converters called “Automatic Design for Manufacturing” (ADFM). This methodology proposes creating Power Converter Arrays (PCAs) using standardized converter cells. The approach is greatly inspired by the microelectronics integrated circuit design flow, power electronics building blocks, and multicell converters. To achieve the desired voltage/current specifications, the PCA conversion stage is made from the assembly of several Conversion-Standard Cells (CSCs) in series and/or parallel. The ADFM uses data-based models to simulate the behavior of a PCA with very little computational effort. These models require a special characterization approach to maximize the amount of knowledge while minimizing the amount of data. This approach consists of establishing an experiment plan to select the relevant measurements that contain the most information about the PCA technology, building an experimental setup that is capable of acquiring data automatically and using statistical learning to train models that can yield precise predictions. This work performed over 210 h of tests in nine different PCAs in order to gather data to the statistical models. The models predict the efficiency and converter temperature of several PCAs, and the accuracy is compared with real measurements. Finally, the models are employed to compare the performance of PCAs in a specific battery charging application.

scholarly journals Review: Machine learning techniques in analog/RF integrated circuit design, synthesis, layout, and test

Integration ◽  
2021 ◽  
Vol 77 ◽  
pp. 113-130
Author(s):  
Engin Afacan ◽  
Nuno Lourenço ◽  
Ricardo Martins ◽  
Günhan Dündar
Keyword(s):  
Machine Learning ◽  
Circuit Design ◽  
Integrated Circuit ◽  
Machine Learning Techniques ◽  
Integrated Circuit Design ◽  
Design Synthesis ◽  
Learning Techniques

Development of Superconductor Advanced Integrated Circuit Design Flow using Synopsys Tools

2021 ◽  
pp. 1-1
Author(s):  
Amol Inamdar ◽  
Jushya Ravi ◽  
Sukanya Sagarika Meher ◽  
Stephen Miller ◽  
Mustafa Eren Celik ◽  
...  
Keyword(s):  
Circuit Design ◽  
Integrated Circuit ◽  
Design Flow ◽  
Integrated Circuit Design

Constraint Propagation for Analog and Mixed-Signal Integrated Circuit Design

2020 ◽  
Author(s):  
Krinke Andreas
Keyword(s):  
Integrated Circuits ◽  
Design Process ◽  
Integrated Circuit ◽  
Constraint Propagation ◽  
Digital Integrated Circuits ◽  
Ic Design ◽  
Integrated Circuit Design ◽  
Mixed Signal ◽  
Actual Design ◽  
Manual Tasks

While the design of digital integrated circuits (ICs) is largely automated, the design of analog/ mixed-signal (AMS) ICs is still dominated by manual tasks. One of the biggest obstacles to further automation is the large number of constraints that have to be taken into account during AMS IC design. They are derived both from the specifcation and during the actual design process and must be fulflled before production of the IC can begin. The aim of this work is to present our fndings regarding the formalization of constraints and their propagation within the design hierarchy in order to make them visible and verifable in all relevant cells. Constraints are integrated into the AMS IC design process so that they can be considered at all stages of the design. Our research enables the integration and consideration of constraints in all types of design tools—not only for AMS IC design, but after generalization for any design process. Contents Abbreviations VIII Selected Symbols X ...

The Integration on Electrical Control Systems Based on Optimized Method

2012 ◽  
Vol 490-495 ◽  
pp. 2604-2608
Author(s):  
Ai Rong Zhang
Keyword(s):  
Integrated Circuit ◽  
Large Scale ◽  
Vlsi Design ◽  
Hardware Architecture ◽  
Logic Device ◽  
Integrated Circuit Design ◽  
Large Scale Integration ◽  
Hardware Description ◽  
Description Languages ◽  
Scale Integration

Very large scale integration (VLSI) applications have improved control implementation performance. Indeed, an application specific integrated circuit (ASIC) solution can exploit efficiently specificities of the control algorithms that fixed hardware architecture cannot do. For example, parallel calculation cannot be included in a software solution based on sequential processing. In addition, ASIC can reduce wire and electromagnetic field interference by a fully system on a chip (SoC) integration. However, there are still two main drawbacks to an integrated circuit solution: design complexity and reuse difficulty. This is true even with programmable logic device (PLD) solutions. Conception aid developer (CAD) combined with hardware description languages (HDL) and VLSI design methodology have accelerated conception and reuse. Nevertheless, the main problem of integrated circuit design is to define the hardware architecture; this is particularly true for heterogeneous algorithm structures such as electrical controls.

Security-Aware 2.5D Integrated Circuit Design Flow Against Hardware IP Piracy

Computer ◽  
2017 ◽  
Vol 50 (5) ◽  
pp. 62-71 ◽  
Author(s):  
Yang Xie ◽  
Chongxi Bao ◽  
Ankur Srivastava
Keyword(s):  
Circuit Design ◽  
Integrated Circuit ◽  
Design Flow ◽  
Integrated Circuit Design ◽  
Ip Piracy

Enhancing an Automatic Analog IC Design Flow by Using a Technology-Independent Module Generator

2015 ◽  
pp. 102-133 ◽  
Author(s):  
António Canelas ◽  
Ricardo Martins ◽  
Ricardo Póvoa ◽  
Nuno Lourenço ◽  
Jorge Guilherme ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Performance Enhancement ◽  
Design Flow ◽  
Optimization Process ◽  
Ic Design ◽  
Analog Ic ◽  
Benchmark Circuit ◽  
Device Structures

This chapter presents a new methodology to enhance the optimization process of an analog integrated circuit synthesis tool, AIDA-C, by taking into account the floorplan of the circuit. The addition of the new Analog Module Generator (AMG) in the AIDA framework creates the possibility to efficiently explore the circuit floorplan during the optimization process and to improve the quality of the final floorplan by adding complex device structures enhancing the layout matching, symmetry, and routing, reducing some of the non-idealities to which analog integrated circuits are so sensitive. The performance enhancement attained with AMG is demonstrated using a well-known benchmark circuit, optimized by AIDA-C with and without taking into account AMG's complex structures in the evaluation of the circuit's floorplan.

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