pulse condition
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Non-Simultaneous Triggering Induced Failure of CS-MCT Under Repetitive High-Current Pulse Condition

2020 ◽  
Vol 20 (1) ◽  
pp. 214-220 ◽  
Author(s):  
Wanjun Chen ◽  
Huiling Zuo ◽  
Qijun Zhou ◽  
Wuhao Gao ◽  
Yun Xia ◽  
...  
Keyword(s):  
Current Pulse ◽  
High Current ◽  
Pulse Condition

Analyzing Electric Field Effect by Applying an Ultra-Short Time Pulse Condition in Hafnium Oxide-Based RRAM

2018 ◽  
Vol 39 (8) ◽  
pp. 1163-1166 ◽  
Author(s):  
Cheng-Hsien Wu ◽  
Shih-Kai Lin ◽  
Chih-Hung Pan ◽  
Po-Hsun Chen ◽  
Wen-Yan Lin ◽  
...  
Keyword(s):  
Electric Field ◽  
Hafnium Oxide ◽  
Field Effect ◽  
Electric Field Effect ◽  
Pulse Condition ◽  
Short Time ◽  
Time Pulse

Real-time instantaneous radar frequency measurement for pulse on pulse condition

2017 ◽  
Author(s):  
Ismail Emre Ortatatli ◽  
Adnan Orduyilmaz ◽  
Omer Ozdil ◽  
Mahmut Serin ◽  
Abdullah Emin Gurel ◽  
...  
Keyword(s):  
Real Time ◽  
Frequency Measurement ◽  
Pulse Condition ◽  
Radar Frequency

scholarly journals Numerical Study of Energy Capability of Si/SiC LDMOSFETs

2017 ◽  
Vol 897 ◽  
pp. 751-754 ◽  
Author(s):  
C.W. Chan ◽  
Fan Li ◽  
Philip A. Mawby ◽  
Peter M. Gammon
Keyword(s):  
Mixed Mode ◽  
Numerical Study ◽  
Chip Area ◽  
Pulse Condition ◽  
Power Pulse ◽  
Switching Circuits

A comparable study is made on the energy capability of 190 V LDMOSFETs in Si/SiC, SOI, PSOI and PSOSiC technology, using capacitive and inductive switching circuits established in SILVACO Mixed-mode simulators. The results show that the PSOSiC has a thermal advantage compared with other SOI structures under a 48-μs-power-pulse condition, but the Si/SiC device offers superior cooling and energy handling ability in all switching cases despite having a larger chip area.

scholarly journals Design and implementation of a chinese pulse condition acquisition system

2016 ◽  
Vol 21 (4) ◽  
pp. 449-458 ◽  
Author(s):  
Rui Wang ◽  
Shilong Lu ◽  
Qingjuan Li ◽  
Lei Xu ◽  
Fei Chang
Keyword(s):  
Acquisition System ◽  
Pulse Condition ◽  
Design And Implementation
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