TLB-pilot: Mitigating TLB Contention Attack on GPUs with Microarchitecture-Aware Scheduling

Co-running GPU kernels on a single GPU can provide high system throughput and improve hardware utilization, but this raises concerns on application security. We reveal that translation lookaside buffer (TLB) attack, one of the common attacks on CPU, can happen on GPU when multiple GPU kernels co-run. We investigate conditions or principles under which a TLB attack can take effect, including the awareness of GPU TLB microarchitecture, being lightweight, and bypassing existing software and hardware mechanisms. This TLB-based attack can be leveraged to conduct Denial-of-Service (or Degradation-of-Service) attacks. Furthermore, we propose a solution to mitigate TLB attacks. In particular, based on the microarchitecture properties of GPU, we introduce a software-based system, TLB-pilot, that binds thread blocks of different kernels to different groups of streaming multiprocessors by considering hardware isolation of last-level TLBs and the application’s resource requirement. TLB-pilot employs lightweight online profiling to collect kernel information before kernel launches. By coordinating software- and hardware-based scheduling and employing a kernel splitting scheme to reduce load imbalance, TLB-pilot effectively mitigates TLB attacks. The result shows that when under TLB attack, TLB-pilot mitigates the attack and provides on average 56.2% and 60.6% improvement in average normalized turnaround times and overall system throughput, respectively, compared to the traditional Multi-Process Service based co-running solution. When under TLB attack, TLB-pilot also provides up to 47.3% and 64.3% improvement (41% and 42.9% on average) in average normalized turnaround times and overall system throughput, respectively, compared to a state-of-the-art co-running solution for efficiently scheduling of thread blocks.

A novel design for hardware interface board with reduced resource utilization

The final cost of an integrated circuit (IC) is proportional to its testing time. One of the main goals of test engineers when building an IC test solution is to reduce test time. Reduction of Test time is achieved by multi-site testing where multiple ICs are tested simultaneously using automated test equipment (ATE). During multi-site testing, if a certain test requires abundant resources, it is accomplished by testing one set of ICs at a time while the other ICs remain idle, thus lengthening the total test time. In digital-analog hybrid ICs, both analog and digital tests need to be performed, increasing the tester resource requirement and causing digital resource shortage. This paper describes a hardware interface board (HIB) design for a test case of a digital-analog IC on Teradyne’s ETS-364 ATE. The HIB's design allows the ATE to perform multi-site I²C based tests, which usually require lot of tester resources, utilizing only two digital resources and one measurement resource. This design achieves halving the I2C test time while lowering the number of resources necessary for multi-site testing compared to set-by-set testing. The proposed work has achieved up to 90.625% of resource reduction for multisite testing for a single test.

FPGA implementation of LDPC soft-decision decoders based DCSK for spread spectrum applications

<span lang="EN-US">Spread spectrum (SS) communications have attracted interest because of their channel attenuation immunity and low intercept potential. Apart from some extra features such as basic transceiver structures, chaotic communication would be the analog alternative to digital SS systems. Differential chaos shift keying (DCSK) systems, non-periodic and random characteristics among chaos carriers as well as their interaction with soft data are designed based on low-density parity-check (LDPC) codes in this brief. Because of simple structure, and glorious ability to <span>correct errors. Using the Xilinx kintex7 FPGA development kit, we investigate the hardware performance and resource requirement tendencies of the DCSK</span> communication system based on LDPC decoding algorithms (Prob. Domain, Log Domain and Min-Sum) over AWGN channel. The results indicate that the proposed system model has substantial improvements in the performance of the bit error rate (BER) and the real-time process. The Min-Sum decoder has relatively fewer FPGA resources than the other decoders. The implemented system will achieve 10-4 BER efficiency with 5 dB associate E_b/N_o as a coding gain.</span>

Soil Enzyme Activity and Stoichiometry: Linking Soil Microorganism Resource Requirement and Legume Carbon Rhizodeposition

Legumes provide multiple ecosystem services in agricultural systems. The objectives of this study were to evaluate the influence of different legumes through C rhizodeposition on the dynamics of C, N and P in soil and on microbial communities’ resource requirements. Legumes pea (Pisum sativum L.), faba bean (Vicia faba L.), white clover (Trifolium repens L.), crimson clover (Trifolium incarnatum L.) and non-legume wheat (Triticum aestivum L.) were grown in pots. Carbon rhizodeposition was quantified by using 13CO2 labeling, and six soil enzyme activities were measured: β-glucosidase (BG), arylamidase (ARYLN), N-acetyl-glucosaminidase (NAG), phosphatases (PHO) and alkaline and acid phosphatases (AKP and ACP). Enzyme stoichiometry approaches were applied. The results showed that BG, NAG and ACP activities were positively influenced by faba bean and clovers. Enzyme stoichiometry analysis revealed a limitation of microorganisms in C and P resources at the plant reproductive stage. These results were explained by plant functional traits. Plant biomass production, root total length, the ability of plants to rhizodeposit C and the C and N content of plant tissues were the main explicative factors. This study also shows that N and C nutrient supplies positively contribute to nutritional requirements and the growth of microorganisms and P availability in soil.

Energy-Efficient Virtual Network Function Reconfiguration Strategy Based on Short-Term Resources Requirement Prediction

In Network Function Virtualization, the resource demand of the network service evolves with the change of network traffic. VNF dynamic migration has become an effective method to improve network performance. However, for the time-varying resource demand, how to minimize the long-term energy consumption of the network while guaranteeing the Service Level Agreement (SLA) is the key issue that lacks previous research. To tackle this dilemma, this paper proposes an energy-efficient reconfiguration algorithm for VNF based on short-term resource requirement prediction (RP-EDM). Our algorithm uses LSTM to predict VNF resource requirements in advance to eliminate the lag of dynamic migration and determines the timing of migration. RP-EDM eliminates SLA violations by performing VNF separation on potentially overloaded servers and consolidates low-load servers timely to save energy. Meanwhile, we consider the power consumption of servers when booting up, which is existing objectively, to avoid switching on/off the server frequently. The simulation results suggest that RP-EDM has a good performance and stability under machine learning models with different accuracy. Moreover, our algorithm increases the total service traffic by about 15% while ensuring a low SLA interruption rate. The total energy cost is reduced by more than 20% compared with the existing algorithms.

Pandemic-response adenoviral vector and RNA vaccine manufacturing

Rapid global COVID-19 pandemic response by mass vaccination is currently limited by the rate of vaccine manufacturing. This study presents a techno-economic feasibility assessment and comparison of three vaccine production platform technologies deployed during the COVID-19 pandemic: (1) adenovirus-vectored (AVV) vaccines, (2) messenger RNA (mRNA) vaccines, and (3) the newer self-amplifying RNA (saRNA) vaccines. Besides assessing the baseline performance of the production process, the impact of key design and operational uncertainties on the productivity and cost performance of these vaccine platforms were also evaluated using variance-based global sensitivity analysis. Cost and resource requirement projections were also computed for manufacturing multi-billion vaccine doses for covering the current global demand shortage and for providing annual booster immunizations. This model-based assessment provides key insights to policymakers and vaccine manufacturers for risk analysis, asset utilisation, directions for future technology improvements and future epidemic/pandemic preparedness, given the disease-agnostic nature of these vaccine production platforms.

Resonant quantum principal component analysis

Principal component analysis (PCA) has been widely adopted to reduce the dimension of data while preserving the information. The quantum version of PCA (qPCA) can be used to analyze an unknown low-rank density matrix by rapidly revealing the principal components of it, i.e., the eigenvectors of the density matrix with the largest eigenvalues. However, because of the substantial resource requirement, its experimental implementation remains challenging. Here, we develop a resonant analysis algorithm with minimal resource for ancillary qubits, in which only one frequency-scanning probe qubit is required to extract the principal components. In the experiment, we demonstrate the distillation of the first principal component of a 4 × 4 density matrix, with an efficiency of 86.0% and a fidelity of 0.90. This work shows the speedup ability of quantum algorithm in dimension reduction of data and thus could be used as part of quantum artificial intelligence algorithms in the future.

Resource-Optimized Fermionic Local-Hamiltonian Simulation on a Quantum Computer for Quantum Chemistry

The ability to simulate a fermionic system on a quantum computer is expected to revolutionize chemical engineering, materials design, nuclear physics, to name a few. Thus, optimizing the simulation circuits is of significance in harnessing the power of quantum computers. Here, we address this problem in two aspects. In the fault-tolerant regime, we optimize the Rz and T gate counts along with the ancilla qubit counts required, assuming the use of a product-formula algorithm for implementation. We obtain a savings ratio of two in the gate counts and a savings ratio of eleven in the number of ancilla qubits required over the state of the art. In the pre-fault tolerant regime, we optimize the two-qubit gate counts, assuming the use of the variational quantum eigensolver (VQE) approach. Specific to the latter, we present a framework that enables bootstrapping the VQE progression towards the convergence of the ground-state energy of the fermionic system. This framework, based on perturbation theory, is capable of improving the energy estimate at each cycle of the VQE progression, by about a factor of three closer to the known ground-state energy compared to the standard VQE approach in the test-bed, classically-accessible system of the water molecule. The improved energy estimate in turn results in a commensurate level of savings of quantum resources, such as the number of qubits and quantum gates, required to be within a pre-specified tolerance from the known ground-state energy. We also explore a suite of generalized transformations of fermion to qubit operators and show that resource-requirement savings of up to more than 20%, in small instances, is possible.

Real Time Implementation of Face Recognition based Smart Attendance System

This research work addresses the issue of incorporating an automatic attendance system to the frame of an institution using face detection and recognition techniques. The proposed system aims at reducing computational time with available hardware to yield more efficient results. The proposed model utilizes Histogram Oriented Gradients and facial encodings derived from facial landmarks. It also addresses the problems related to accuracy of facial recognition and the resource requirement for quick, real-time facial recognition by applying multi-processing. The improvement in performance in terms of accuracy across two different methods, and the improvement in terms of time requirement for the same method using different strategies have also been documented for demonstration. The designed system demonstrates the effectiveness of task parallelization with a minimum amount of hardware desiderata. The system has been designed to an optimum self-sustaining ecosystem which can efficiently operate on its own accord and compute comprehensible feedback without the requirement of any third-party human interference. A Graphical User Interface has been incorporated into the system for maximum user comprehensibility