Study on Creep Damage in Sn60Pb40 and Sn3.8Ag0.7Cu (Lead-Free) Solders in c-Si Solar PV Cell Interconnections under In-Situ Thermal Cycling in Ghana

A numerical study on the creep damage in soldered interconnects in c-Si solar photovoltaic cells has been conducted using equivalent creep strain, accumulated creep strain and accumulated creep energy density methods. The study used data from outdoor weathering of photovoltaic (PV) modules over a three-year period (2012–2014) to produce temperature cycle profiles that served as thermal loads and boundary conditions for the investigation of the soldered interconnects’ thermo-mechanical response when exposed to real-world conditions. A test region average (TRA) temperature cycle determined in a previous study for the 2012–2014 data was also used. The appropriate constitutive models of constituent materials forming a typical solar cell were utilized to generate accurate material responses to evaluate the damage from the thermal cycles. This study modeled two forms of soldered interconnections: Sn60Pb40 (SnPb) and Sn3.8Ag0.7Cu (Pb-free). The results of the damage analysis of the interconnections generated from the thermal cycle loads using accumulated creep strain method showed that the Pb-free solder interconnection recorded greater damage than that of the SnPb-solder interconnection for the TRA, 2012, 2013 and 2014 temperature cycles. The percentage changes from SnPb to Pb-free were 57.96%, 43.61%, 44.87% and 45.43%, respectively. This shows significant damage to the Pb-free solder under the TRA conditions. Results from the accumulated creep energy density (ACED) method showed a percentage change of 71.4% (from 1.3573 × 105 J/mm3 to 2.3275 × 105 J/mm3) in accumulated creep energy density by replacing SnPb-solder with Pb-free solder interconnection during the TRA thermal cycle. At the KNUST test site in Kumasi, Ghana, the findings show that Sn60Pb40 solder interconnections are likely to be more reliable than Pb-free solder interconnections. The systematic technique employed in this study would be useful to the thermo-mechanical reliability research community. The study also provides useful information to PV design and manufacturing engineers for the design of robust PV modules.

Life prediction in c-Si solar cell interconnections under in-situ thermal cycling in Kumasi in Ghana

Purpose A numerical study on the reliability of soldered interconnects of c-Si solar photovoltaic cells has been conducted. Design/methodology/approach A three-year data (2012–2014) from outdoor weathering of PV modules was used to generate temperature cycle profiles to serve as thermal loads and boundary conditions for the investigation of the thermo-mechanical response of the soldered interconnects when subjected to real outdoor conditions using finite element analysis (FEA) Software (Ansys. 18.2). Two types of soldered interconnections, namely, Sn60Pb40 and Sn3.8Ag0.7Cu (Pb-free), were modelled in this study. Findings Life prediction results from accumulated creep energy density damage show that the solder interconnects will achieve maximum life under the 2014 thermal cycle loading. In particular, the Sn60Pb40 solder interconnection is expected to achieve 14,153 cycles (25.85 years) whilst the Pb-free solder interconnection is expected to achieve 9,249 cycles (16.89 years). Additionally, under the test region average (TRA) thermal cycle, the Pb-free and Pb-Sn solder interconnections are expected to achieve 7,944 cycles (13.69 years) and 12,814 cycles (23.4 years), respectively. The study shows that Sn60Pb40 solder interconnections are likely to exhibit superior reliability over the Pb-free solder interconnections at the test site. Practical implications This study would be useful to electronics manufacturing industry in the search for a suitable alternative to SnPb solders and also the thermo-mechanical reliability research community and manufacturers in the design of robust PV modules. Originality/value The study has provided TRA data/results which could be used to represent the test region instead of a particular year. The study also indicates that more than six thermal cycles are required before any meaningful conclusions can be drawn. Finally, the life of the two types of solders (SnPb and Pb-free) as interconnecting materials for c-Si PV have been predicted for the test region (Kumasi in sub-Saharan Africa).

An Efficient Bump Pad Design to Mitigate the Flip Chip Package Induced Stress

A numerical analysis using Finite Element Models of different stress buffer configurations has been proposed for improving the reliability of solder joints and at the same time decrease the induced stresses in the back-end-of-line (BEOL). A non-underfilled Flip Chip with a silicon die size of 10×10 mm2 mounted on a FR4 board has been used as test vehicle. The die to substrate interconnection is done by using copper pillars and Sn solder with a diameter of 50 μm and a total standoff of 50 μm. The thickness of the passivation, a copper pedestal fabricated as a redistribution I/O pad and a polymeric buffer layer with different geometric configurations were used in combination to minimize the induced stresses in the BEOL and increase the flexibility of the copper pillar interconnections. It was found that a stiff layer below the copper pillar has the major contribution to reduce the stress in the BEOL, while the softer buffer layer minimizes the induced plastic strain in the solder interconnection. Fabrication of the samples with optimal configuration are under progress.