scholarly journals Analysis of the Practical Implementation of Flicker Measurement Coprocessor for AMI Meters

Energies ◽  
2021 ◽  
Vol 14 (6) ◽  
pp. 1589
Author(s):  
Krzysztof Kołek ◽  
Andrzej Firlit ◽  
Krzysztof Piątek ◽  
Krzysztof Chmielowiec
Keyword(s):  
Code Generation ◽  
State Of The Art ◽  
Power Grids ◽  
Practical Implementation ◽  
System A ◽  
Measuring Devices ◽  
Point Representation ◽  
Measurement Algorithm ◽  
On Chip ◽  
Vhdl Code

Monitoring power quality (PQ) indicators is an important part of modern power grids’ maintenance. Among different PQ indicators, flicker severity coefficients Pst and Plt are measures of voltage fluctuations. In state-of-the-art PQ measuring devices, the flicker measurement channel is usually implemented as a dedicated processor subsystem. Implementation of the IEC 61000-4-15 compliant flicker measurement algorithm requires a significant amount of computational power. In typical PQ analysers, the flicker measurement is usually implemented as a part of the meter’s algorithm performed by the main processor. This paper considers the implementation of the flicker measurement as an FPGA module to offload the processor subsystem or operate as an IP core in FPGA-based system-on-chip units. The measurement algorithm is developed and validated as a Simulink diagram, which is then converted to a fixed-point representation. Parts of the diagram are applied for automatic VHDL code generation, and the classifier block is implemented as a local soft-processor system. A simple eight-bit processor operates within the flicker measurement coprocessor and performs statistical operations. Finally, an IP module is created that can be considered as a flicker coprocessor module. When using the coprocessor, the main processor’s only role is to trigger the coprocessor and read the results, while the coprocessor independently calculates the flicker coefficients.

scholarly journals Design And Implemation Of An Enhanced Dds Based Digital Modulator For Multiple Modulation Schemes

2011 ◽  
pp. 102-107
Author(s):  
Manoj Kollam
Keyword(s):  
Code Generation ◽  
System Level ◽  
Practical Implementation ◽  
Direct Digital Synthesis ◽  
Synthesis Tool ◽  
Digital Synthesis ◽  
Selection For ◽  
Evaluation Board ◽  
Flexible Programming ◽  
Vhdl Code

This paper deals with the design & implementation of a Digital Modulator based on the FPGA. The design is implemented using the Enhanced Direct Digital Synthesis (DDS) Technology. The basic DDS architecture is enhanced with the minimum hardware to facilitate the complete system level support for different kinds of Modulations with minimal FPGA resources. The size of the ROM look up is reduced by using the mapping logic. The Design meets the present Software Define Radio (SDR) requirements and provides the user selection for desired modulation technique to be used. The VHDL programming language is used for modeling the hardware blocks for powerful and flexible programming and to avoid VHDL code generation tools. The design is simulated in the Model Sim Simulation Tool and Synthesized using the Xilinx ISE Synthesis Tool. The architecture is implemented on the SPARTAN-3A FPGA from Xilinx Family in the SPARTAN-3A evaluation board. The experimental results obtained demonstrate the usefulness of the proposed system in terms of the system resources, its capabilities for design, validation and practical implementation purposes.

scholarly journals Bioengineered Islet Cell Transplantation

2021 ◽  
Author(s):  
Kevin Bellofatto ◽  
Beat Moeckli ◽  
Charles-Henri Wassmer ◽  
Margaux Laurent ◽  
Graziano Oldani ◽  
...  
Keyword(s):  
State Of The Art ◽  
Diabetes Research ◽  
Islet Cell Transplantation ◽  
Β Cell ◽  
Cell Compartment ◽  
Factors Affecting ◽  
Insulin Activity ◽  
On Chip

Abstract Purpose of Review β cell replacement via whole pancreas or islet transplantation has greatly evolved for the cure of type 1 diabetes. Both these strategies are however still affected by several limitations. Pancreas bioengineering holds the potential to overcome these hurdles aiming to repair and regenerate β cell compartment. In this review, we detail the state-of-the-art and recent progress in the bioengineering field applied to diabetes research. Recent Findings The primary target of pancreatic bioengineering is to manufacture a construct supporting insulin activity in vivo. Scaffold-base technique, 3D bioprinting, macro-devices, insulin-secreting organoids, and pancreas-on-chip represent the most promising technologies for pancreatic bioengineering. Summary There are several factors affecting the clinical application of these technologies, and studies reported so far are encouraging but need to be optimized. Nevertheless pancreas bioengineering is evolving very quickly and its combination with stem cell research developments can only accelerate this trend.

scholarly journals Advances in the Application of Machine Learning Techniques for Power System Analytics: A Survey

Energies ◽  
2021 ◽  
Vol 14 (16) ◽  
pp. 4776
Author(s):  
Seyed Mahdi Miraftabzadeh ◽  
Michela Longo ◽  
Federica Foiadelli ◽  
Marco Pasetti ◽  
Raul Igual
Keyword(s):  
Machine Learning ◽  
Power Systems ◽  
Smart Grids ◽  
State Of The Art ◽  
Smart Cities ◽  
Power Grids ◽  
Machine Learning Techniques ◽  
Learning Techniques ◽  
New Research ◽  
Traditional Approaches

The recent advances in computing technologies and the increasing availability of large amounts of data in smart grids and smart cities are generating new research opportunities in the application of Machine Learning (ML) for improving the observability and efficiency of modern power grids. However, as the number and diversity of ML techniques increase, questions arise about their performance and applicability, and on the most suitable ML method depending on the specific application. Trying to answer these questions, this manuscript presents a systematic review of the state-of-the-art studies implementing ML techniques in the context of power systems, with a specific focus on the analysis of power flows, power quality, photovoltaic systems, intelligent transportation, and load forecasting. The survey investigates, for each of the selected topics, the most recent and promising ML techniques proposed by the literature, by highlighting their main characteristics and relevant results. The review revealed that, when compared to traditional approaches, ML algorithms can handle massive quantities of data with high dimensionality, by allowing the identification of hidden characteristics of (even) complex systems. In particular, even though very different techniques can be used for each application, hybrid models generally show better performances when compared to single ML-based models.

TRANSFORMATION OF NESTED LOOPS WITH MODULO INDEXING TO AFFINE RECURRENCES

1994 ◽  
Vol 04 (03) ◽  
pp. 271-280 ◽  
Author(s):  
FLORIN BALASA ◽  
FRANK H.M. FRANSSEN ◽  
FRANCKY V.M. CATTHOOR ◽  
HUGO J. DE MAN
Keyword(s):  
Code Generation ◽  
State Of The Art ◽  
Transformation Method ◽  
Control Flow ◽  
Code Optimization ◽  
Transformation Techniques ◽  
Hermite Normal Form ◽  
Nested Loops ◽  
Affine Functions ◽  
Systems Transformation

For multi-dimensional (M-D) signal and data processing systems, transformation of algorithmic specifications is a major instrument both in code optimization and code generation for parallelizing compilers and in control flow optimization as a preprocessor for architecture synthesis. State-of-the-art transformation techniques are limited to affine index expressions. This is however not sufficient for many important applications in image, speech and numerical processing. In this paper, a novel transformation method is introduced, oriented to the subclass of algorithm specifications that contains modulo expressions of affine functions to index M-D signals. The method employs extensively the concept of Hermite normal form. The transformation method can be carried out in polynomial time, applying only integer arithmetic.

scholarly journals An on-chip imaging droplet-sorting system: a real-time shape recognition method to screen target cells in droplets with single cell resolution

2017 ◽  
Vol 7 (1) ◽  
Author(s):  
Mathias Girault ◽  
Hyonchol Kim ◽  
Hisayuki Arakawa ◽  
Kenji Matsuura ◽  
Masao Odaka ◽  
...  
Keyword(s):  
Single Cell ◽  
Real Time ◽  
Shape Recognition ◽  
Target Cells ◽  
Recognition Method ◽  
System A ◽  
Time Shape ◽  
Droplet Sorting ◽  
On Chip ◽  
Sorting System

Automated Anthropometric Measuring Devices for Use in Mass-Screening

2000 ◽  
Vol 44 (38) ◽  
pp. 719-722
Author(s):  
William F. Moroney
Keyword(s):  
Mass Screening ◽  
State Of The Art ◽  
Measurement Techniques ◽  
The State ◽  
Anthropometric Measurement ◽  
Review Of The Literature ◽  
Measuring Devices ◽  
Measurement Devices ◽  
Electro Magnetic

The purpose of this paper is to describe the state of the art in anthropometric measuring devices used for mass screening. In addition, technologies which could be used for automated mass screening are identified and described. A review of the literature identified only two operational anthropometric measurement devices currently used for mass screening. A variety of potentially applicable measurement techniques including acoustic, light, electro-magnetic, potentiometric/electro-optical (including digitizing arms) technologies were identified and described. Data describing the capabilities and limitations of these systems are also provided.

scholarly journals Argus CNN Accelerator Based on Kernel Clustering and Resource-Aware Pruning

2021 ◽  
Vol 27 (3) ◽  
pp. 57-70
Author(s):  
Damjan M. Rakanovic ◽  
Vuk Vranjkovic ◽  
Rastislav J. R. Struharik
Keyword(s):  
Digital Signal Processor ◽  
State Of The Art ◽  
Digital Signal ◽  
Pruning Algorithm ◽  
Kernel Clustering ◽  
Field Programmable ◽  
Comparable Performance ◽  
On Chip ◽  
Resource Characteristics ◽  
Resource Aware

Paper proposes a two-step Convolutional Neural Network (CNN) pruning algorithm and resource-efficient Field-programmable gate array (FPGA) CNN accelerator named “Argus”. The proposed CNN pruning algorithm first combines similar kernels into clusters, which are then pruned using the same regular pruning pattern. The pruning algorithm is carefully tailored for FPGAs, considering their resource characteristics. Regular sparsity results in high Multiply-accumulate (MAC) efficiency, reducing the amount of logic required to balance workloads among different MAC units. As a result, the Argus accelerator requires about 170 Look-up tables (LUTs) per Digital Signal Processor (DSP) block. This number is close to the average LUT/DPS ratio for various FPGA families, enabling balanced resource utilization when implementing Argus. Benchmarks conducted using Xilinx Zynq Ultrascale + Multi-Processor System-on-Chip (MPSoC) indicate that Argus is achieving up to 25 times higher frames per second than NullHop, 2 and 2.5 times higher than NEURAghe and Snowflake, respectively, and 2 times higher than NVDLA. Argus shows comparable performance to MIT’s Eyeriss v2 and Caffeine, requiring up to 3 times less memory bandwidth and utilizing 4 times fewer DSP blocks, respectively. Besides the absolute performance, Argus has at least 1.3 and 2 times better GOP/s/DSP and GOP/s/Block-RAM (BRAM) ratios, while being competitive in terms of GOP/s/LUT, compared to some of the state-of-the-art solutions.

Practical implementation of the German Genetic Diagnostics Act (GenDG) in Laboratory Medicine, the Human Genetics Laboratory and Genetic Counselling1)

2012 ◽  
Vol 35 (5) ◽  
pp. ---
Author(s):  
Matthias Orth ◽  
Imma Rost ◽  
Georg F. Hoffmann ◽  
Hanns-Georg Klein
Keyword(s):  
Human Genetics ◽  
State Of The Art ◽  
Personalised Medicine ◽  
Direct Analysis ◽  
Genetic Diagnostics ◽  
Practical Implementation ◽  
Gene Products ◽  
In Vitro Diagnostics ◽  
Current Version

Abstract The German Genetic Diagnostics Act (GenDG) in its current version, effective since February 2010, has far-reaching consequences for all physicians and also for many patients. After more than 1 year of experience working with the GenDG, much of the previous criticism has proved to be inadequate. From the beginning, experts complained that besides the direct analysis of germline DNA, gene products should not be included in the scope of the act – potentially having a very broad impact on the entire in vitro diagnostics field. Problems with applying the act range from the impossibility of distinguishing between genetic and non-genetic examinations to enormous bureaucratic hurdles, which in some areas interfere with an efficient, state-of-the-art patient care (i.e., newborn screening, treatment with blood products). The rapid progress in technology, which is currently revolutionizing genetic diagnostics worldwide, has been set with narrow boundaries by the German GenDG, while at the same time “personalised medicine”, applying exactly the same technologies, is being funded by government research grants. From the viewpoints of the concerned physicians and patients, there is an urgent need to amend the act itself, and efficient action should be taken by the committee on genetic diagnostics (GEKO), which was appointed to define guidelines for the practical use of the GenDG.

scholarly journals Stability of Power Grids: State-of-the-art and Future Trends

2019 ◽  
Vol 217 ◽  
pp. 01017
Author(s):  
Nikita Tomin ◽  
Daniil Panasetsky ◽  
Alexey Iskakov
Keyword(s):  
Steady State ◽  
Lyapunov Function ◽  
Power Systems ◽  
Transient Stability ◽  
State Of The Art ◽  
Test System ◽  
Power Grids ◽  
Small Signal ◽  
Small Signal Stability ◽  
Signal Stability

The state of the art of transient stability and steady-state (small signal) stability in power grids are reviewed. Transient stability concepts are illustrated with simple examples; in particular, we consider two machine learning-based methods for computing region of attraction: ROA produced by Neural Network Lyapunov Function; estimation of the ROA of IEEE 39-bus system using Gaussian process and Converse Lyapunov function. We discuss steady state stability in power systems, and using Prony’s modal analysis for evaluating small signal stability for the 7 Bus Test system and real French power system.

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