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Solid State Electronics Letters
Latest Publications
TOTAL DOCUMENTS
48
(FIVE YEARS 48)
H-INDEX
3
(FIVE YEARS 3)
Published By Elsevier
2589-2088
Latest Documents
Most Cited Documents
Contributed Authors
Related Sources
Related Keywords
Latest Documents
Most Cited Documents
Contributed Authors
Related Sources
Related Keywords
Enhanced Performance Double-gate Junction-less Tunnel Field Effect Transistor for Bio-Sensing Application
Solid State Electronics Letters
◽
10.1016/j.ssel.2021.12.005
◽
2021
◽
Vol 3
◽
pp. 19-26
Author(s):
Isukapalli Vishnu Vardhan Reddy
◽
Suman Lata Tripathi
Keyword(s):
Field Effect
◽
Field Effect Transistor
◽
Double Gate
◽
Effect Transistor
◽
Sensing Application
◽
Tunnel Field Effect Transistor
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Double Edge-Triggered Half-Static Clock-Gating D-Type Flip-Flop
Solid State Electronics Letters
◽
10.1016/j.ssel.2021.08.001
◽
2021
◽
Vol 3
◽
pp. 1-4
Author(s):
Wing-Kong Ng
◽
Wing-Shan Tam
◽
Chi-Wah Kok
Keyword(s):
Clock Gating
◽
Flip Flop
◽
Double Edge
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Tutorial on Resistor Trimming
Solid State Electronics Letters
◽
10.1016/j.ssel.2021.12.004
◽
2021
◽
Vol 3
◽
pp. 11-18
Author(s):
Wing Shan Tam
◽
Chi Wah Kok
Download Full-text
A Current Comparison Based Voltage Supervisory Circuit with On-Chip Detection Voltage Trimming
Solid State Electronics Letters
◽
10.1016/j.ssel.2021.07.001
◽
2021
◽
Vol 3
◽
pp. 5-10
Author(s):
Wing-Kong Ng
◽
Wing-Shan Tam
◽
Chi-Wah Kok
Keyword(s):
On Chip
◽
A Current
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A Capacitor-Reused 2b/Cycle Active-Passive Second-order Noise-Shaping SAR ADC
Solid State Electronics Letters
◽
10.1016/j.ssel.2021.12.006
◽
2021
◽
Vol 3
◽
pp. 27-31
Author(s):
Xiao Wang
◽
Hetong Wang
◽
Kong-Pang Pun
Keyword(s):
Second Order
◽
Sar Adc
◽
Noise Shaping
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An N-Channel Band-to-Band Tunneling Flash Memory Design Optimization
Solid State Electronics Letters
◽
10.1016/j.ssel.2021.02.001
◽
2020
◽
Vol 2
◽
pp. 140-145
Author(s):
Wing-Kong Ng
◽
Wing-Shan Tam
◽
Chi-Wah Kok
Keyword(s):
Design Optimization
◽
Flash Memory
◽
Memory Design
◽
Band To Band Tunneling
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Impact of back gate work function for enhancement of analog/RF performance of AJDMDG Stack MOSFET
Solid State Electronics Letters
◽
10.1016/j.ssel.2020.12.005
◽
2020
◽
Vol 2
◽
pp. 117-123
Author(s):
Arighna Basak
◽
Angsuman Sarkar
Keyword(s):
Work Function
◽
Back Gate
◽
Rf Performance
◽
Gate Work Function
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Nano-pillars metasurface modelled for perfect absorption at specific wavelengths in infrared spectral regime
Solid State Electronics Letters
◽
10.1016/j.ssel.2020.11.002
◽
2020
◽
Author(s):
Roxana Tomescu
◽
Cristian Kusko
◽
Dana Cristea
◽
Ramona Calinoiu
◽
Catalin Parvulescu
Keyword(s):
Perfect Absorption
◽
Infrared Spectral
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Design and Optimization of Double Balanced Gilbert Cell Mixer in 130 nm CMOS Process
Solid State Electronics Letters
◽
10.1016/j.ssel.2020.12.004
◽
2020
◽
Vol 2
◽
pp. 129-139
Author(s):
Dr. Satyanarayana R․V․S․
◽
Subramanyam Avvaru
Keyword(s):
Cmos Process
◽
Design And Optimization
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The Simulation Study on Internal Stress in Multilayer Thermistors during Soldering Process
Solid State Electronics Letters
◽
10.1016/j.ssel.2020.12.003
◽
2020
◽
Vol 2
◽
pp. 124-128
Author(s):
NamChol Yu
◽
JuSong Kim
◽
Yong Ho Li
◽
Song Chol Pak
Keyword(s):
Internal Stress
◽
Simulation Study
◽
Soldering Process
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