Lead‐Free Printed Wiring Board Surface Finishes

2020 ◽  
pp. 249-305
Author(s):  
Rick Nichols
Keyword(s):  
Lead Free ◽  
Printed Wiring Board ◽  
Surface Finishes ◽  
Board Surface ◽  
Wiring Board

The influence of temperature and humidity on printed wiring board surface finishes: Immersion tin vs organic azoles

1994 ◽  
Vol 23 (8) ◽  
pp. 779-785 ◽  
Author(s):  
U. Ray ◽  
I. Artaki ◽  
H. M. Gordon ◽  
P. T. Vianco
Keyword(s):  
Printed Wiring Board ◽  
Influence Of Temperature ◽  
Surface Finishes ◽  
Board Surface ◽  
Temperature And Humidity ◽  
Wiring Board ◽  
Immersion Tin

Lead-Free Board Surface Finishes

2007 ◽  
pp. 221-269 ◽  
Author(s):  
Hugh Roberts ◽  
Kuldip Johal
Keyword(s):  
Lead Free ◽  
Surface Finishes ◽  
Board Surface

Study of immersion silver and tin printed-circuit-board surface finishes in lead-free solder applications

2004 ◽  
Vol 33 (9) ◽  
pp. 977-990 ◽  
Author(s):  
Minna Arra ◽  
Dongkai Shangguan ◽  
Dongji Xie ◽  
Janne Sundelin ◽  
Toivo Lepistö ◽  
...  
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Lead Free ◽  
Lead Free Solder ◽  
Printed Circuit ◽  
Surface Finishes ◽  
Board Surface ◽  
Free Solder ◽  
Immersion Silver

Impact of printed wiring board coatings on the reliability of lead-free chip-scale package interconnections

2004 ◽  
Vol 19 (11) ◽  
pp. 3214-3223 ◽  
Author(s):  
T.T. Mattila ◽  
V. Vuorinen ◽  
J.K. Kivilahti
Keyword(s):  
Grain Boundaries ◽  
Lead Free ◽  
Solder Paste ◽  
Printed Wiring Boards ◽  
Printed Wiring Board ◽  
Snagcu Solder ◽  
Chip Scale Package ◽  
Free Solder ◽  
Wiring Board ◽  
Reliability Performance

When lead-free solder alloys mix with lead-free component and board metallizations during reflow soldering, the solder interconnections become multicomponent alloy systems whose microstructures cannot be predicted on the basis of the SnPb metallurgy. To better understand the influences of these microstructures on the reliability of lead-free electronics assemblies, SnAgCu-bumped components were reflow-soldered with near-eutectic SnAgCu solder pastes on Ni(P)|m.Au- and organic solderability preservative (OSP)-coated printed wiring boards and tested under cyclic thermal shock loading conditions. The reliability performance under thermomechanical loading was found to be controlled by the kinetics of recrystallization. Because ductile fracturing of the as-soldered tin-rich colonies would require a great amount of plastic work, the formation of continuous network of grain boundaries by recrystallization is needed for cracks to nucleate and propagate intergranularly through the solder interconnections. Detailed microstructural observations revealed that cracks nucleate and grow along the grain boundaries especially between the recrystallized part and the non-recrystallized part of the interconnections. The thermal cycling test data were analyzed statistically by combining the Weibull statistics and the analysis of variance. The interconnections on Ni(P)|m.Au were found out to be more reliable than those on Cu|m.OSP. This is due to the extensive dissolution of Cu conductor, in the case of the Cu|m.OSP assemblies, into molten solder that makes the microstructure to differ noticeably from that of the Ni(P)|m.Au interconnections. Because of large primary Cu6Sn5 particles, the Cu-enriched interconnections enhance the onset of recrystallization, and cracking of the interconnections is therefore faster. The solder paste composition had no statistically significant effect on the reliability performance.

Investigating the Influence of Uneven Printed Wiring Board Surface on Volume Increment of Deposited Solder Pastes

2010 ◽  
Vol 2 (3) ◽  
pp. 163-169
Author(s):  
Oliver Krammer ◽  
Laszlo Milan Molnar ◽  
Laszlo Jakab ◽  
Andras Szabó
Keyword(s):  
Printed Wiring Board ◽  
Volume Increment ◽  
Board Surface ◽  
Solder Pastes ◽  
Wiring Board

Influence of Surface Mount Lead End Geometry on Fatigue Life

1994 ◽  
Vol 116 (2) ◽  
pp. 157-160 ◽  
Author(s):  
Vineet K. Gupta ◽  
Donald B. Barker
Keyword(s):  
Fatigue Life ◽  
Solder Joint ◽  
Thermal Fatigue ◽  
Coefficient Of Thermal Expansion ◽  
Printed Wiring Board ◽  
Surface Mount ◽  
Compliant Surface ◽  
Board Surface ◽  
Cte Mismatch ◽  
Wiring Board

The local coefficient of thermal expansion (CTE) mismatch between compliant surface mount component leads and the solder that is used to attach the components to a printed wiring board can dramatically influence the thermal fatigue life of the solder joint. To quantify the contribution of the local CTE mismatch to the overall thermal fatigue damage of the solder joint, a finite element thermal fatigue simulation using an energy partitioning technique is used to compare four different lead end shapes. The four lead configurations considered are J-lead, and three gullwings leads; one with the foot parallel to the board surface, one with the foot sloped slightly downward towards the board, and one with the foot sloped slightly upward. The dimensions of the leads are purposely chosen so that the in-plane compliance is equal for the different lead shapes, only the shape of the lead end varied. Comparisons are first made with equal solder joint heights and then the solder height of the gull-wing lead is varied between 0.05 to 0.23 mm (2 to 9 mils). The influence of the solder wetting angle is also investigated.

Case Studies of Brittle Interfacial Failures in Area Array Solder Interconnects

2000 ◽  
Author(s):  
George M. Wenger ◽  
Richard J. Coyle ◽  
Patrick P. Solan ◽  
John K. Dorey ◽  
Courtney V. Dodd ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Case Studies ◽  
Failure Modes ◽  
Electroless Nickel ◽  
Electrical Performance ◽  
Printed Wiring Board ◽  
Solder Interconnects ◽  
Area Array ◽  
Surface Finishes ◽  
Soldering Reaction

Abstract A common pad finish on area array (BGA or CSP) packages and printed wiring board (PWB) substrates is Ni/Au, using either electrolytic or electroless deposition processes. Although both Ni/Au processes provide flat, solderable surface finishes, there are an increasing number of applications of the electroless nickel/immersion gold (ENi/IAu) surface finish in response to requirements for increased density and electrical performance. This increasing usage continues despite mounting evidence that Ni/Au causes or contributes to catastrophic, brittle, interfacial solder joint fractures. These brittle, interfacial fractures occur early in service or can be generated under a variety of laboratory testing conditions including thermal cycling (premature failures), isothermal aging (high temperature storage), and mechanical testing. There are major initiatives by electronics industry consortia as well as research by individual companies to eliminate these fracture phenomena. Despite these efforts, interfacial fractures associated with Ni/Au surface finishes continue to be reported and specific failure mechanisms and root cause of these failures remains under investigation. Failure analysis techniques and methodologies are crucial to advancing the understanding of these phenomena. In this study, the scope of the fracture problem is illustrated using three failure analysis case studies of brittle interfacial fractures in area array solder interconnects. Two distinct failure modes are associated with Ni/Au surface finishes. In both modes, the fracture surfaces appear to be relatively flat with little evidence of plastic deformation. Detailed metallography, scanning electron microscopy (SEM), energy dispersive x-ray analysis (EDX), and an understanding of the metallurgy of the soldering reaction are required to avoid misinterpreting the failure modes.

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