High‐Speed Organic Single‐Crystal Transistor Responding to Very High Frequency Band

2020 ◽  
Vol 30 (11) ◽  
pp. 1909501 ◽  
Author(s):  
Akifumi Yamamura ◽  
Takaaki Sakon ◽  
Kayo Takahira ◽  
Takahiro Wakimoto ◽  
Mari Sasaki ◽  
...  
1996 ◽  
Vol 35 (Part 1, No. 9A) ◽  
pp. 4799-4806 ◽  
Author(s):  
Takeshi Aoki ◽  
Kazuaki Fukasawa ◽  
Yasuo Nishikawa ◽  
Nobuo Mikoshiba

1991 ◽  
Vol 58 (9) ◽  
pp. 986-987 ◽  
Author(s):  
H. Ikezi ◽  
J. S. DeGrassie ◽  
J. Drake

2014 ◽  
Vol 638-640 ◽  
pp. 1229-1232
Author(s):  
Kun Ming Mao ◽  
Ting Ting Wang ◽  
Qian Wen Ru ◽  
Yan Li

Based on the Abaqus parallel computing cluster system platform, the three-dimensional finite element model of train-track-viaduct/embankment-foundation-soil coupling is established. The three-dimensional space-time variation and Fourier spectrums characters of ground surface vibration vertical accelerations by high-speed train running on viaduct and embankment are simulated. The result shows that ground surface vibration is mainly excited by periodic axle force of the train in the site near the viaduct pier. In the site far from the viaduct pier, ground surface vibration is mainly from the transmission of the site near the viaduct pier. With the increased distance between the viaduct pier, the peak value of ground surface vibration vertical acceleration decreases, and decreases significantly when the distance is within 10m. There are two main frequency bands of Fourier spectrum of ground surface vibration vertical acceleration: low-frequency band 0-12Hz and high-frequency band 35-47Hz of viaduct route, and low-frequency band 0-21Hz and high-frequency band 25-45Hz of embankment route. In general, with the increased distance between viaduct/embankment, Fourier spectrum amplitude of every frequency band decrease, and attenuation speed of high-frequency band is much faster than-frequency band’s.


2003 ◽  
Vol 13 (01) ◽  
pp. 175-219 ◽  
Author(s):  
G. G. FREEMAN ◽  
B. JAGANNATHAN ◽  
N. ZAMDMER ◽  
R. GROVES ◽  
R. SINGH ◽  
...  

Silicon-based devices, including the increasingly available SiGe-based devices, are now demonstrating fT and fMAX values over 200 GHz. These recent advances open the door to a wide range of silicon-based very high frequency, low power and highly integrated solutions. Trends in silicon MOS, SiGe HBT, SiGe MODFET and SiGe strained silicon FETs are reported. Silicon inroads to device functions viewed as the sole realm of III-V technologies are also being demonstrated. Capability and trends of the integrated silicon photodiode are reported here as an example. Integration of these high-speed devices into a complex circuit requires on-chip passive device functionality at such high frequency. Key devices to enable integration are the inductor, varactor, and transmission line, and operation of these devices at high frequency is reported. Further, we discuss noise isolation issues and techniques, which may be used when minimizing cross-talk within a conductive silicon substrate.


2005 ◽  
Vol 8 (2) ◽  
pp. 17-35 ◽  
Author(s):  
Andrés López-Pita ◽  
Francesc Robusté

2001 ◽  
Vol 21 (3-4) ◽  
pp. 549-561 ◽  
Author(s):  
S. K. Misra ◽  
S. I. Andronenko ◽  
K. A. Earle ◽  
J. H. Freed

Author(s):  
R. L. Tutwiler ◽  
J. P. Stitt ◽  
K. K. Shung ◽  
Q. Wu ◽  
T. A. Ritter ◽  
...  

The purpose of this system is to have the capability to characterize the performance of very high frequency transducers and arrays. The analog front end is computer controlled by a set of de-multiplexers and multiplexers. The output of the multiplexer network is connected to a TGC array, which is interfaced to a high-speed data acquisition system. A software GUI (Graphical User Interface) has been designed to accomplish this task [1]. A programmable digital I/O interface allows collection of RF channel data and has the capability to be interfaced to a very high frequency analog beam-former under construction. The system front-end electronics (pulsers, receivers, T/R switches, multiplexers, and demultiplexers) have been characterized [2, 3]. The digital I/O signal interface has been integrated and tested. The hardware front end has been integrated to the array interface distribution panel. The individual transducer elements impulse responses have been evaluated and the performance of the array has been tested with a wire test phantom to characterize lateral and axial resolution.


Sign in / Sign up

Export Citation Format

Share Document