scholarly journals From model to low noise amplifier monolithic microwave integrated circuit: 0.03–2.6 GHz plastic quad‐flat no‐leads packaged Gallium‐Nitride low noise amplifier monolithic microwave integrated circuit

2021 ◽  
Author(s):  
Sinan Osmanoglu ◽  
Ekmel Ozbay
Keyword(s):  
Gallium Nitride ◽  
Integrated Circuit ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Microwave Integrated Circuit ◽  
Monolithic Microwave Integrated Circuit ◽  
Noise Amplifier

Design of a Ku-band MMIC LNA with a Simple T-type Input Matching Network

2020 ◽  
Vol 29 (11) ◽  
pp. 2020006
Author(s):  
Tian Qi ◽  
Songbai He ◽  
Cheng Zhong ◽  
Zhitao Zhu
Keyword(s):  
Integrated Circuit ◽  
Return Loss ◽  
Noise Figure ◽  
Low Noise ◽  
Matching Network ◽  
Monolithic Microwave Integrated Circuit ◽  
Input Matching ◽  
Satellite Applications ◽  
Feedback Structure ◽  
Noise Amplifier

In this paper, the design of a wideband monolithic microwave integrated circuit (MMIC) low-noise amplifier (LNA) fabricated in 0.13-[Formula: see text]m GaAs pHEMT process is presented. A simple T-type input matching network (IMN) and a source feedback structure are employed to achieve low noise figure (NF). The MMIC LNA, which operates across 12–18[Formula: see text]GHz, can be used for satellite applications. Experimental results show an NF around 1.5[Formula: see text]dB in 12–17.5[Formula: see text]GHz and a minimum NF of 1.21[Formula: see text]dB at 16.5[Formula: see text]GHz. In addition, a flat small-signal gain of [Formula: see text][Formula: see text]dB is achieved at 13.5–17.5[Formula: see text]GHz. The input return loss is lower than [Formula: see text] dB at 12–14.5[Formula: see text]GHz and the output return loss is lower than [Formula: see text] dB at 12–17[Formula: see text]GHz. The power consumed is lower than 0.3[Formula: see text]W and the [Formula: see text] (1-dB compression point) output power is around 13[Formula: see text]dBm.

scholarly journals Design of Low Power Low Noise Amplifier using Gm-boosted Technique

2018 ◽  
Vol 9 (3) ◽  
pp. 685 ◽  
Author(s):  
Maizan Muhamad ◽  
Norhayati Soin ◽  
Harikrishnan Ramiah
Keyword(s):  
Low Power ◽  
Circuit Design ◽  
Integrated Circuit ◽  
Wireless Lan ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Center Frequency ◽  
Design Specifications ◽  
Noise Amplifier

This paper presents the development of low noise amplifier integrated circuit using 130nm RFCMOS technology. The low noise amplifier function is to amplify extremely low noise amplifier without adding noise and preserving required signal to a noise ratio. A detailed methodology and analysis that leads to a low power LNA are being discussed throughout this paper. Inductively degenerated and Gm-boosted topology are used to design the circuit. Design specifications are focused for 802.11b/g/n IEEE Wireless LAN Standards with center frequency of 2.4 GHz. The best low noise amplifier provides a power gain (S21) of 19.841 dB with noise figure (NF) of 1.497 dB using the gm-boosted topology while the best low power amplifier drawing 4.19mW power from a 1.2V voltage supply using the inductively degenerated.

A 23‐31 GHz gallium nitride high‐robustness low‐noise amplifier with 1.1‐dB noise figure and 28‐dBm saturation output power

2019 ◽  
Vol 62 (3) ◽  
pp. 1077-1081 ◽  
Author(s):  
Penghui Zheng ◽  
Shiyong Zhang ◽  
Jianxing Xu ◽  
Rong Wang ◽  
Xiaodong Tong
Keyword(s):  
Gallium Nitride ◽  
Output Power ◽  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Noise Amplifier

243 GHz low-noise amplifier MMICs and modules based on metamorphic HEMT technology

2014 ◽  
Vol 6 (3-4) ◽  
pp. 215-223 ◽  
Author(s):  
Axel Tessmann ◽  
Volker Hurm ◽  
Arnulf Leuther ◽  
Hermann Massler ◽  
Rainer Weber ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Noise Figure ◽  
Coplanar Waveguide ◽  
High Electron Mobility Transistors ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
High Electron ◽  
Monolithic Integrated Circuit ◽  
Electron Mobility Transistors ◽  
Noise Amplifier

Two compact H-band (220–325 GHz) low-noise millimeter-wave monolithic integrated circuit (MMIC) amplifiers have been developed, based on a grounded coplanar waveguide (GCPW) technology utilizing 50 and 35 nm metamorphic high electron mobility transistors (mHEMTs). For low-loss packaging of the circuits, a set of waveguide-to-microstrip transitions has been realized on 50-μm-thick GaAs substrates demonstrating an insertion loss of <0.5 dB at 243 GHz. By applying the 50 nm gate-length process, a four-stage cascode amplifier module achieved a small-signal gain of 30.6 dB at 243 GHz and more than 28 dB in the bandwidth from 218 to 280 GHz. A second amplifier module, based on the 35-nm mHEMT technology, demonstrated a considerably improved gain of 34.6 dB at 243 GHz and more than 32 dB between 210 and 280 GHz. At the operating frequency, the two broadband low-noise amplifier modules achieved a room temperature noise figure of 5.6 dB (50 nm) and 5.0 dB (35 nm), respectively.

scholarly journals Ultrahigh Frequency Ultrasonic Transducers Design with Low Noise Amplifier Integrated Circuit

Micromachines ◽  
2018 ◽  
Vol 9 (10) ◽  
pp. 515 ◽  
Author(s):  
Di Li ◽  
Chunlong Fei ◽  
Qidong Zhang ◽  
Yani Li ◽  
Yintang Yang ◽  
...  
Keyword(s):  
Integrated Circuit ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
Ultrasonic Transducers ◽  
Oxide Semiconductor ◽  
Ultrahigh Frequency ◽  
Common Source ◽  
Echo Signal ◽  
Silicon Lens ◽  
Noise Amplifier

This paper describes the design of an ultrahigh frequency ultrasound system combined with tightly focused 500 MHz ultrasonic transducers and high frequency wideband low noise amplifier (LNA) integrated circuit (IC) model design. The ultrasonic transducers are designed using Aluminum nitride (AlN) piezoelectric thin film as the piezoelectric element and using silicon lens for focusing. The fabrication and characterization of silicon lens was presented in detail. Finite element simulation was used for transducer design and evaluation. A custom designed LNA circuit is presented for amplifying the ultrasound echo signal with low noise. A Common-source and Common-gate (CS-CG) combination structure with active feedback is adopted for the LNA design so that high gain and wideband performances can be achieved simultaneously. Noise and distortion cancelation mechanisms are also employed in this work to improve the noise figure (NF) and linearity. Designed by using a 0.35 μm complementary metal oxide semiconductor (CMOS) technology, the simulated power gain of the echo signal wideband amplifier is 22.5 dB at 500 MHz with a capacitance load of 1.0 pF. The simulated NF at 500 MHz is 3.62 dB.

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