243 GHz low-noise amplifier MMICs and modules based on metamorphic HEMT technology

2014 ◽  
Vol 6 (3-4) ◽  
pp. 215-223 ◽  
Author(s):  
Axel Tessmann ◽  
Volker Hurm ◽  
Arnulf Leuther ◽  
Hermann Massler ◽  
Rainer Weber ◽  
...  

Two compact H-band (220–325 GHz) low-noise millimeter-wave monolithic integrated circuit (MMIC) amplifiers have been developed, based on a grounded coplanar waveguide (GCPW) technology utilizing 50 and 35 nm metamorphic high electron mobility transistors (mHEMTs). For low-loss packaging of the circuits, a set of waveguide-to-microstrip transitions has been realized on 50-μm-thick GaAs substrates demonstrating an insertion loss of <0.5 dB at 243 GHz. By applying the 50 nm gate-length process, a four-stage cascode amplifier module achieved a small-signal gain of 30.6 dB at 243 GHz and more than 28 dB in the bandwidth from 218 to 280 GHz. A second amplifier module, based on the 35-nm mHEMT technology, demonstrated a considerably improved gain of 34.6 dB at 243 GHz and more than 32 dB between 210 and 280 GHz. At the operating frequency, the two broadband low-noise amplifier modules achieved a room temperature noise figure of 5.6 dB (50 nm) and 5.0 dB (35 nm), respectively.

2015 ◽  
Vol 815 ◽  
pp. 369-373
Author(s):  
Norhawati Ahmad ◽  
S.S. Jamuar ◽  
M. Mohammad Isa ◽  
Siti Salwa Mat Isa ◽  
Muhammad Mahyiddin Ramli ◽  
...  

This paper presents the linear modelling of high breakdown InP pseudomorphic High Electron Mobility Transistors (pHEMT) that have been developed and fabricated at the University of Manchester (UoM) for low noise applications mainly for the Square Kilometre Array (SKA) project. The ultra-low leakage properties of a novel InGaAs/InAlAs/InP pHEMTs structure were used to fabricate a series of transistor with total gate width ranging from 0.2 mm to 1.2 mm. The measured DC and S-Parameters data from the fabricated devices were then used for the transistors’ modelling. The transistors demonstrated to operate up to frequencies of 25 GHz. These transistors models are used in the design of Low Noise Amplifiers (LNAs) using fully Monolithic Microwave Integrated Circuit (MMIC) technology.


2021 ◽  
Vol 2021 (2) ◽  
Author(s):  
E. Kudabay ◽  
◽  
A. Salikh ◽  
V.A. Moseichuk ◽  
A. Krivtsun ◽  
...  

The purpose of this paper is to design a microwave monolithic integrated circuit (MMIC) for low noise amplifier (LNA) X-band (7-12 GHz) based on technology of gallium nitride (GaN) high electron mobility transistor (HEMT) with a T-gate, which has 100 nm width, on a silicon (Si) semi-insulating substrate of the OMMIC company. The amplifier is based on common-source transistors with series feedback, which was formed by high-impedance transmission line, and with parallel feedback to match noise figure and power gain. The key characteristics of an LNA are noise figure and gain. However, in this paper, it was decided to design the LNA, which should have a good margin in terms of input and output power. As a result, GaN technology was chosen, which has a higher noise figure compared to other technologies, but eliminates the need for an input power limiter, which in turn significantly increases the overall noise figure. As a result LNA MMIC was developed with the following characteristics: noise figure less than 1.6 dB, small-signal gain more than 20 dB, return loss better than -13 dB and output power more than 19 dBm with 1 dB compression in the range from 7 to 12 GHz in dimensions 2x1.5 mm², which has a supply voltage of 8 V and a current consumption of less than 70 mA. However, it should be said that LNA was only modeled in the AWR DE.


Author(s):  
Maizan Muhamad ◽  
Norhayati Soin ◽  
Harikrishnan Ramiah

This paper presents the development of low noise amplifier integrated circuit using 130nm RFCMOS technology. The low noise amplifier function is to amplify extremely low noise amplifier without adding noise and preserving required signal to a noise ratio. A detailed methodology and analysis that leads to a low power LNA are being discussed throughout this paper. Inductively degenerated and Gm-boosted topology are used to design the circuit. Design specifications are focused for 802.11b/g/n IEEE Wireless LAN Standards with center frequency of 2.4 GHz. The best low noise amplifier provides a power gain (S21) of 19.841 dB with noise figure (NF) of 1.497 dB using the gm-boosted topology while the best low power amplifier drawing 4.19mW power from a 1.2V voltage supply using the inductively degenerated.


Proceedings ◽  
2020 ◽  
Vol 63 (1) ◽  
pp. 52
Author(s):  
Moustapha El Bakkali ◽  
Said Elkhaldi ◽  
Intissar Hamzi ◽  
Abdelhafid Marroun ◽  
Naima Amar Touhami

In this paper, a 3.1–11 GHz ultra-wideband low noise amplifier with low noise figure, high power gain S21, low reverse gain S12, and high linearity using the OMMIC ED02AH process, which employs a 0.18 μm Pseudomorphic High Electron Mobility Transistor is presented. This Low Noise Amplifier (LNA) was designed with the Advanced Design System simulator in distributed matrix architecture. For the low noise amplifier, four stages were used obtaining a good input/output matching. An average power gain S21 of 11.6 dB with a gain ripple of ±0.6 dB and excellent noise figure of 3.55 to 4.25 dB is obtained in required band with a power dissipation of 48 mW under a supply voltage of 2 V. The input compression point 1 dB and third-order input intercept point are −1.5 and 23 dBm respectively. The core layout size is 1.8 × 1.2 mm2.


Electronics ◽  
2019 ◽  
Vol 8 (11) ◽  
pp. 1365
Author(s):  
Alina Caddemi ◽  
Emanuele Cardillo ◽  
Giovanni Crupi ◽  
Luciano Boglione ◽  
Jason Roussos

This contribution deals with the microwave linear characterization and noise figure measurement of four on-wafer GaAs pseudomorphic high-electron mobility transistors having scaled gate widths. The proposed measurement campaign has been fulfilled in two different laboratories: The University of Messina, Italy and US Naval Research Laboratory, Washington, DC, USA. Two equivalent approaches have been straightforwardly employed: a standard tuner-based technique and a novel tuner-less technique. The effectiveness of the novel technique has been confirmed as carried out independently by the two laboratories, evidencing the benefits of both techniques. The proposed experimental activity highlights the applicability of the tunerless technique for the noise characterization of advanced on-wafer devices without the constraint imposed by the addition of a source tuner to the standard measurement setup.


2002 ◽  
Vol 02 (01) ◽  
pp. L13-L19 ◽  
Author(s):  
S. LONG ◽  
L. ESCOTTE ◽  
J. GRAFFEUIL ◽  
P. FELLON ◽  
D. GEIGER ◽  
...  

The noise behavior of pseudomorphic double-heterojunction high electron mobility transistors dedicated to power applications is investigated in this paper and compared to conventional low noise field effect transistors. The noise is analyzed from an extrinsic and an intrinsic point of view. It appears that the minimum noise figure is similar for the two devices even if the intrinsic noise sources are different. We explain this phenomenon using the double-heterojunction mode of operation.


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